1 /* 2 * Copyright (c) 2017-2024, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef ERRATA_REPORT_H 8 #define ERRATA_REPORT_H 9 10 #include <lib/cpus/cpu_ops.h> 11 12 13 #define ERRATUM_WA_FUNC_SIZE CPU_WORD_SIZE 14 #define ERRATUM_CHECK_FUNC_SIZE CPU_WORD_SIZE 15 #define ERRATUM_ID_SIZE 4 16 #define ERRATUM_CVE_SIZE 2 17 #define ERRATUM_CHOSEN_SIZE 1 18 #define ERRATUM_MITIGATED_SIZE 1 19 20 #define ERRATUM_WA_FUNC 0 21 #define ERRATUM_CHECK_FUNC ERRATUM_WA_FUNC + ERRATUM_WA_FUNC_SIZE 22 #define ERRATUM_ID ERRATUM_CHECK_FUNC + ERRATUM_CHECK_FUNC_SIZE 23 #define ERRATUM_CVE ERRATUM_ID + ERRATUM_ID_SIZE 24 #define ERRATUM_CHOSEN ERRATUM_CVE + ERRATUM_CVE_SIZE 25 #define ERRATUM_MITIGATED ERRATUM_CHOSEN + ERRATUM_CHOSEN_SIZE 26 #define ERRATUM_ENTRY_SIZE ERRATUM_MITIGATED + ERRATUM_MITIGATED_SIZE 27 28 /* Errata status */ 29 #define ERRATA_NOT_APPLIES 0 30 #define ERRATA_APPLIES 1 31 #define ERRATA_MISSING 2 32 33 #ifndef __ASSEMBLER__ 34 #include <lib/cassert.h> 35 36 void print_errata_status(void); 37 38 #if ERRATA_A520_2938996 || ERRATA_X4_2726228 39 unsigned int check_if_affected_core(void); 40 #endif 41 42 /* 43 * NOTE that this structure will be different on AArch32 and AArch64. The 44 * uintptr_t will reflect the change and the alignment will be correct in both. 45 */ 46 struct erratum_entry { 47 uintptr_t (*wa_func)(uint64_t cpu_rev); 48 uintptr_t (*check_func)(uint64_t cpu_rev); 49 /* Will fit CVEs with up to 10 character in the ID field */ 50 uint32_t id; 51 /* Denote CVEs with their year or errata with 0 */ 52 uint16_t cve; 53 uint8_t chosen; 54 /* TODO(errata ABI): placeholder for the mitigated field */ 55 uint8_t _mitigated; 56 } __packed; 57 58 CASSERT(sizeof(struct erratum_entry) == ERRATUM_ENTRY_SIZE, 59 assert_erratum_entry_asm_c_different_sizes); 60 #else 61 62 /* 63 * errata framework macro helpers 64 * 65 * NOTE an erratum and CVE id could clash. However, both numbers are very large 66 * and the probablity is minuscule. Working around this makes code very 67 * complicated and extremely difficult to read so it is not considered. In the 68 * unlikely event that this does happen, prepending the CVE id with a 0 should 69 * resolve the conflict 70 */ 71 #define ERRATUM(id) 0, id 72 #define CVE(year, id) year, id 73 #define NO_ISB 1 74 #define NO_ASSERT 0 75 #define NO_APPLY_AT_RESET 0 76 #define APPLY_AT_RESET 1 77 #define GET_CPU_REV 1 78 #define NO_GET_CPU_REV 0 79 80 /* useful for errata that end up always being worked around */ 81 #define ERRATUM_ALWAYS_CHOSEN 1 82 83 #endif /* __ASSEMBLER__ */ 84 85 /* Macro to get CPU revision code for checking errata version compatibility. */ 86 #define CPU_REV(r, p) ((r << 4) | p) 87 88 #endif /* ERRATA_REPORT_H */ 89