1 /* 2 * Copyright (c) 2023-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef CPU_OPS_H 8 #define CPU_OPS_H 9 10 #include <arch.h> 11 12 #define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \ 13 (MIDR_PN_MASK << MIDR_PN_SHIFT) 14 15 /* Hardcode to keep compatible with assembly. sizeof(uintptr_t) */ 16 #if __aarch64__ 17 #define CPU_WORD_SIZE 8 18 #else 19 #define CPU_WORD_SIZE 4 20 #endif /* __aarch64__ */ 21 22 /* The number of CPU operations allowed */ 23 #define CPU_MAX_PWR_DWN_OPS 2 24 25 #if __aarch64__ 26 #define CPU_NO_EXTRA1_FUNC 0 27 #define CPU_NO_EXTRA2_FUNC 0 28 #define CPU_NO_EXTRA3_FUNC 0 29 #define CPU_NO_EXTRA4_FUNC 0 30 #endif /* __aarch64__ */ 31 32 33 /* 34 * Define the sizes of the fields in the cpu_ops structure. Word size is set per 35 * Aarch so keep these definitions the same and each can include whatever it 36 * needs. 37 */ 38 #define CPU_MIDR_SIZE CPU_WORD_SIZE 39 #ifdef IMAGE_AT_EL3 40 #define CPU_RESET_FUNC_SIZE CPU_WORD_SIZE 41 #else 42 #define CPU_RESET_FUNC_SIZE 0 43 #endif /* IMAGE_AT_EL3 */ 44 #define CPU_EXTRA1_FUNC_SIZE CPU_WORD_SIZE 45 #define CPU_EXTRA2_FUNC_SIZE CPU_WORD_SIZE 46 #define CPU_EXTRA3_FUNC_SIZE CPU_WORD_SIZE 47 #define CPU_EXTRA4_FUNC_SIZE CPU_WORD_SIZE 48 #define CPU_E_HANDLER_FUNC_SIZE CPU_WORD_SIZE 49 /* The power down core and cluster is needed only in BL31 and BL32 */ 50 #if defined(IMAGE_BL31) || defined(IMAGE_BL32) 51 #define CPU_PWR_DWN_OPS_SIZE CPU_WORD_SIZE * CPU_MAX_PWR_DWN_OPS 52 #else 53 #define CPU_PWR_DWN_OPS_SIZE 0 54 #endif /* defined(IMAGE_BL31) || defined(IMAGE_BL32) */ 55 56 #define CPU_ERRATA_LIST_START_SIZE CPU_WORD_SIZE 57 #define CPU_ERRATA_LIST_END_SIZE CPU_WORD_SIZE 58 /* Fields required to print errata status */ 59 #if REPORT_ERRATA 60 #define CPU_CPU_STR_SIZE CPU_WORD_SIZE 61 /* BL1 doesn't require mutual exclusion and printed flag. */ 62 #if defined(IMAGE_BL31) || defined(IMAGE_BL32) 63 #define CPU_ERRATA_LOCK_SIZE CPU_WORD_SIZE 64 #define CPU_ERRATA_PRINTED_SIZE CPU_WORD_SIZE 65 #else 66 #define CPU_ERRATA_LOCK_SIZE 0 67 #define CPU_ERRATA_PRINTED_SIZE 0 68 #endif /* defined(IMAGE_BL31) || defined(IMAGE_BL32) */ 69 #else 70 #define CPU_CPU_STR_SIZE 0 71 #define CPU_ERRATA_LOCK_SIZE 0 72 #define CPU_ERRATA_PRINTED_SIZE 0 73 #endif /* REPORT_ERRATA */ 74 75 #if defined(IMAGE_BL31) && CRASH_REPORTING 76 #define CPU_REG_DUMP_SIZE CPU_WORD_SIZE 77 #else 78 #define CPU_REG_DUMP_SIZE 0 79 #endif /* defined(IMAGE_BL31) && CRASH_REPORTING */ 80 81 82 /* 83 * Define the offsets to the fields in cpu_ops structure. Every offset is 84 * defined based on the offset and size of the previous field. 85 */ 86 #define CPU_MIDR 0 87 #define CPU_RESET_FUNC CPU_MIDR + CPU_MIDR_SIZE 88 #if __aarch64__ 89 #define CPU_EXTRA1_FUNC CPU_RESET_FUNC + CPU_RESET_FUNC_SIZE 90 #define CPU_EXTRA2_FUNC CPU_EXTRA1_FUNC + CPU_EXTRA1_FUNC_SIZE 91 #define CPU_EXTRA3_FUNC CPU_EXTRA2_FUNC + CPU_EXTRA2_FUNC_SIZE 92 #define CPU_EXTRA4_FUNC CPU_EXTRA3_FUNC + CPU_EXTRA3_FUNC_SIZE 93 #define CPU_E_HANDLER_FUNC CPU_EXTRA4_FUNC + CPU_EXTRA4_FUNC_SIZE 94 #define CPU_PWR_DWN_OPS CPU_E_HANDLER_FUNC + CPU_E_HANDLER_FUNC_SIZE 95 #else 96 #define CPU_PWR_DWN_OPS CPU_RESET_FUNC + CPU_RESET_FUNC_SIZE 97 #endif /* __aarch64__ */ 98 #define CPU_ERRATA_LIST_START CPU_PWR_DWN_OPS + CPU_PWR_DWN_OPS_SIZE 99 #define CPU_ERRATA_LIST_END CPU_ERRATA_LIST_START + CPU_ERRATA_LIST_START_SIZE 100 #define CPU_CPU_STR CPU_ERRATA_LIST_END + CPU_ERRATA_LIST_END_SIZE 101 #define CPU_ERRATA_LOCK CPU_CPU_STR + CPU_CPU_STR_SIZE 102 #define CPU_ERRATA_PRINTED CPU_ERRATA_LOCK + CPU_ERRATA_LOCK_SIZE 103 #if __aarch64__ 104 #define CPU_REG_DUMP CPU_ERRATA_PRINTED + CPU_ERRATA_PRINTED_SIZE 105 #define CPU_OPS_SIZE CPU_REG_DUMP + CPU_REG_DUMP_SIZE 106 #else 107 #define CPU_OPS_SIZE CPU_ERRATA_PRINTED + CPU_ERRATA_PRINTED_SIZE 108 #endif /* __aarch64__ */ 109 110 #ifndef __ASSEMBLER__ 111 #include <lib/cassert.h> 112 #include <lib/spinlock.h> 113 114 struct cpu_ops { 115 unsigned long midr; 116 #ifdef IMAGE_AT_EL3 117 void (*reset_func)(void); 118 #endif /* IMAGE_AT_EL3 */ 119 #if __aarch64__ 120 void (*extra1_func)(void); 121 void (*extra2_func)(void); 122 void (*extra3_func)(void); 123 void (*extra4_func)(void); 124 void (*e_handler_func)(long es); 125 #endif /* __aarch64__ */ 126 #if (defined(IMAGE_BL31) || defined(IMAGE_BL32)) && CPU_MAX_PWR_DWN_OPS 127 void (*pwr_dwn_ops[CPU_MAX_PWR_DWN_OPS])(void); 128 #endif /* (defined(IMAGE_BL31) || defined(IMAGE_BL32)) && CPU_MAX_PWR_DWN_OPS */ 129 void *errata_list_start; 130 void *errata_list_end; 131 #if REPORT_ERRATA 132 char *cpu_str; 133 #if defined(IMAGE_BL31) || defined(IMAGE_BL32) 134 spinlock_t *errata_lock; 135 unsigned int *errata_reported; 136 #endif /* defined(IMAGE_BL31) || defined(IMAGE_BL32) */ 137 #endif /* REPORT_ERRATA */ 138 #if defined(IMAGE_BL31) && CRASH_REPORTING 139 void (*reg_dump)(void); 140 #endif /* defined(IMAGE_BL31) && CRASH_REPORTING */ 141 } __packed; 142 143 CASSERT(sizeof(struct cpu_ops) == CPU_OPS_SIZE, 144 assert_cpu_ops_asm_c_different_sizes); 145 146 long cpu_get_rev_var(void); 147 void *get_cpu_ops_ptr(void); 148 149 #endif /* __ASSEMBLER__ */ 150 #endif /* CPU_OPS_H */ 151