xref: /rk3399_ARM-atf/include/lib/cpus/aarch64/dsu_def.h (revision 2c3b76ce7b9e36e5c8be3c454110e070a20332ca)
18a677180SJohn Tsichritzis /*
21a74e4a8SAntonio Nino Diaz  * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
38a677180SJohn Tsichritzis  *
48a677180SJohn Tsichritzis  * SPDX-License-Identifier: BSD-3-Clause
58a677180SJohn Tsichritzis  */
68a677180SJohn Tsichritzis 
78a677180SJohn Tsichritzis #ifndef DSU_DEF_H
88a677180SJohn Tsichritzis #define DSU_DEF_H
98a677180SJohn Tsichritzis 
1009d40e0eSAntonio Nino Diaz #include <lib/utils_def.h>
118a677180SJohn Tsichritzis 
128a677180SJohn Tsichritzis /********************************************************************
13*2c3b76ceSLouis Mayencourt  * DSU Cluster Configuration registers definitions
148a677180SJohn Tsichritzis  ********************************************************************/
158a677180SJohn Tsichritzis #define CLUSTERCFR_EL1		S3_0_C15_C3_0
16*2c3b76ceSLouis Mayencourt 
17*2c3b76ceSLouis Mayencourt #define CLUSTERCFR_ACP_SHIFT	U(11)
188a677180SJohn Tsichritzis 
198a677180SJohn Tsichritzis /********************************************************************
20*2c3b76ceSLouis Mayencourt  * DSU Cluster Main Revision ID registers definitions
218a677180SJohn Tsichritzis  ********************************************************************/
22*2c3b76ceSLouis Mayencourt #define CLUSTERIDR_EL1		S3_0_C15_C3_1
23*2c3b76ceSLouis Mayencourt 
248a677180SJohn Tsichritzis #define CLUSTERIDR_REV_SHIFT	U(0)
258a677180SJohn Tsichritzis #define CLUSTERIDR_REV_BITS	U(4)
268a677180SJohn Tsichritzis #define CLUSTERIDR_VAR_SHIFT	U(4)
278a677180SJohn Tsichritzis #define CLUSTERIDR_VAR_BITS	U(4)
288a677180SJohn Tsichritzis 
298a677180SJohn Tsichritzis /********************************************************************
30*2c3b76ceSLouis Mayencourt  * DSU Cluster Auxiliary Control registers definitions
31*2c3b76ceSLouis Mayencourt  ********************************************************************/
32*2c3b76ceSLouis Mayencourt #define CLUSTERACTLR_EL1	S3_0_C15_C3_3
33*2c3b76ceSLouis Mayencourt 
34*2c3b76ceSLouis Mayencourt /********************************************************************
35*2c3b76ceSLouis Mayencourt  * Masks applied for DSU errata workarounds
368a677180SJohn Tsichritzis  ********************************************************************/
371a74e4a8SAntonio Nino Diaz #define DSU_ERRATA_936184_MASK	(U(0x3) << 15)
388a677180SJohn Tsichritzis 
398a677180SJohn Tsichritzis #endif /* DSU_DEF_H */
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