13a8c55f6SVarun Wadekar /* 2*9f1c5dd1SVarun Wadekar * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. 33a8c55f6SVarun Wadekar * 43a8c55f6SVarun Wadekar * Redistribution and use in source and binary forms, with or without 53a8c55f6SVarun Wadekar * modification, are permitted provided that the following conditions are met: 63a8c55f6SVarun Wadekar * 73a8c55f6SVarun Wadekar * Redistributions of source code must retain the above copyright notice, this 83a8c55f6SVarun Wadekar * list of conditions and the following disclaimer. 93a8c55f6SVarun Wadekar * 103a8c55f6SVarun Wadekar * Redistributions in binary form must reproduce the above copyright notice, 113a8c55f6SVarun Wadekar * this list of conditions and the following disclaimer in the documentation 123a8c55f6SVarun Wadekar * and/or other materials provided with the distribution. 133a8c55f6SVarun Wadekar * 143a8c55f6SVarun Wadekar * Neither the name of ARM nor the names of its contributors may be used 153a8c55f6SVarun Wadekar * to endorse or promote products derived from this software without specific 163a8c55f6SVarun Wadekar * prior written permission. 173a8c55f6SVarun Wadekar * 183a8c55f6SVarun Wadekar * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 193a8c55f6SVarun Wadekar * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 203a8c55f6SVarun Wadekar * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 213a8c55f6SVarun Wadekar * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 223a8c55f6SVarun Wadekar * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 233a8c55f6SVarun Wadekar * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 243a8c55f6SVarun Wadekar * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 253a8c55f6SVarun Wadekar * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 263a8c55f6SVarun Wadekar * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 273a8c55f6SVarun Wadekar * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 283a8c55f6SVarun Wadekar * POSSIBILITY OF SUCH DAMAGE. 293a8c55f6SVarun Wadekar */ 303a8c55f6SVarun Wadekar 313a8c55f6SVarun Wadekar #ifndef __DENVER_H__ 323a8c55f6SVarun Wadekar #define __DENVER_H__ 333a8c55f6SVarun Wadekar 34e956e228SVarun Wadekar /* MIDR values for Denver */ 35e956e228SVarun Wadekar #define DENVER_MIDR_PN0 0x4E0F0000 36e956e228SVarun Wadekar #define DENVER_MIDR_PN1 0x4E0F0010 37e956e228SVarun Wadekar #define DENVER_MIDR_PN2 0x4E0F0020 38e956e228SVarun Wadekar #define DENVER_MIDR_PN3 0x4E0F0030 39e956e228SVarun Wadekar #define DENVER_MIDR_PN4 0x4E0F0040 40e956e228SVarun Wadekar 41e956e228SVarun Wadekar /* Implementer code in the MIDR register */ 42e956e228SVarun Wadekar #define DENVER_IMPL 0x4E 433a8c55f6SVarun Wadekar 443a8c55f6SVarun Wadekar /* CPU state ids - implementation defined */ 453a8c55f6SVarun Wadekar #define DENVER_CPU_STATE_POWER_DOWN 0x3 463a8c55f6SVarun Wadekar 47*9f1c5dd1SVarun Wadekar #ifndef __ASSEMBLY__ 48*9f1c5dd1SVarun Wadekar 49*9f1c5dd1SVarun Wadekar /* Disable Dynamic Code Optimisation */ 50*9f1c5dd1SVarun Wadekar void denver_disable_dco(void); 51*9f1c5dd1SVarun Wadekar 52*9f1c5dd1SVarun Wadekar #endif 53*9f1c5dd1SVarun Wadekar 543a8c55f6SVarun Wadekar #endif /* __DENVER_H__ */ 55