1/* 2 * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30#ifndef __CPU_MACROS_S__ 31#define __CPU_MACROS_S__ 32 33#include <arch.h> 34#include <errata_report.h> 35 36#define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \ 37 (MIDR_PN_MASK << MIDR_PN_SHIFT) 38 39/* The number of CPU operations allowed */ 40#define CPU_MAX_PWR_DWN_OPS 2 41 42/* Special constant to specify that CPU has no reset function */ 43#define CPU_NO_RESET_FUNC 0 44 45/* Word size for 64-bit CPUs */ 46#define CPU_WORD_SIZE 8 47 48/* 49 * Whether errata status needs reporting. Errata status is printed in debug 50 * builds for both BL1 and BL31 images. 51 */ 52#if (defined(IMAGE_BL1) || defined(IMAGE_BL31)) && DEBUG 53# define REPORT_ERRATA 1 54#else 55# define REPORT_ERRATA 0 56#endif 57 58 /* 59 * Define the offsets to the fields in cpu_ops structure. 60 */ 61 .struct 0 62CPU_MIDR: /* cpu_ops midr */ 63 .space 8 64/* Reset fn is needed in BL at reset vector */ 65#if defined(IMAGE_BL1) || defined(IMAGE_BL31) 66CPU_RESET_FUNC: /* cpu_ops reset_func */ 67 .space 8 68#endif 69#ifdef IMAGE_BL31 /* The power down core and cluster is needed only in BL31 */ 70CPU_PWR_DWN_OPS: /* cpu_ops power down functions */ 71 .space (8 * CPU_MAX_PWR_DWN_OPS) 72#endif 73 74/* 75 * Fields required to print errata status. Only in BL31 that the printing 76 * require mutual exclusion and printed flag. 77 */ 78#if REPORT_ERRATA 79CPU_ERRATA_FUNC: 80 .space 8 81#ifdef IMAGE_BL31 82CPU_ERRATA_LOCK: 83 .space 8 84CPU_ERRATA_PRINTED: 85 .space 8 86#endif 87#endif 88 89#if defined(IMAGE_BL31) && CRASH_REPORTING 90CPU_REG_DUMP: /* cpu specific register dump for crash reporting */ 91 .space 8 92#endif 93CPU_OPS_SIZE = . 94 95 /* 96 * Write given expressions as quad words 97 * 98 * _count: 99 * Write at least _count quad words. If the given number of 100 * expressions is less than _count, repeat the last expression to 101 * fill _count quad words in total 102 * _rest: 103 * Optional list of expressions. _this is for parameter extraction 104 * only, and has no significance to the caller 105 * 106 * Invoked as: 107 * fill_constants 2, foo, bar, blah, ... 108 */ 109 .macro fill_constants _count:req, _this, _rest:vararg 110 .ifgt \_count 111 /* Write the current expression */ 112 .ifb \_this 113 .error "Nothing to fill" 114 .endif 115 .quad \_this 116 117 /* Invoke recursively for remaining expressions */ 118 .ifnb \_rest 119 fill_constants \_count-1, \_rest 120 .else 121 fill_constants \_count-1, \_this 122 .endif 123 .endif 124 .endm 125 126 /* 127 * Declare CPU operations 128 * 129 * _name: 130 * Name of the CPU for which operations are being specified 131 * _midr: 132 * Numeric value expected to read from CPU's MIDR 133 * _resetfunc: 134 * Reset function for the CPU. If there's no CPU reset function, 135 * specify CPU_NO_RESET_FUNC 136 * _power_down_ops: 137 * Comma-separated list of functions to perform power-down 138 * operatios on the CPU. At least one, and up to 139 * CPU_MAX_PWR_DWN_OPS number of functions may be specified. 140 * Starting at power level 0, these functions shall handle power 141 * down at subsequent power levels. If there aren't exactly 142 * CPU_MAX_PWR_DWN_OPS functions, the last specified one will be 143 * used to handle power down at subsequent levels 144 */ 145 .macro declare_cpu_ops _name:req, _midr:req, _resetfunc:req, \ 146 _power_down_ops:vararg 147 .section cpu_ops, "a" 148 .align 3 149 .type cpu_ops_\_name, %object 150 .quad \_midr 151#if defined(IMAGE_BL1) || defined(IMAGE_BL31) 152 .quad \_resetfunc 153#endif 154#ifdef IMAGE_BL31 1551: 156 /* Insert list of functions */ 157 fill_constants CPU_MAX_PWR_DWN_OPS, \_power_down_ops 1582: 159 /* 160 * Error if no or more than CPU_MAX_PWR_DWN_OPS were specified in the 161 * list 162 */ 163 .ifeq 2b - 1b 164 .error "At least one power down function must be specified" 165 .else 166 .iflt 2b - 1b - (CPU_MAX_PWR_DWN_OPS * CPU_WORD_SIZE) 167 .error "More than CPU_MAX_PWR_DWN_OPS functions specified" 168 .endif 169 .endif 170#endif 171 172#if REPORT_ERRATA 173 .ifndef \_name\()_cpu_str 174 /* 175 * Place errata reported flag, and the spinlock to arbitrate access to 176 * it in the data section. 177 */ 178 .pushsection .data 179 define_asm_spinlock \_name\()_errata_lock 180 \_name\()_errata_reported: 181 .word 0 182 .popsection 183 184 /* Place CPU string in rodata */ 185 .pushsection .rodata 186 \_name\()_cpu_str: 187 .asciz "\_name" 188 .popsection 189 .endif 190 191 /* 192 * Weakly-bound, optional errata status printing function for CPUs of 193 * this class. 194 */ 195 .weak \_name\()_errata_report 196 .quad \_name\()_errata_report 197 198#ifdef IMAGE_BL31 199 /* Pointers to errata lock and reported flag */ 200 .quad \_name\()_errata_lock 201 .quad \_name\()_errata_reported 202#endif 203#endif 204 205#if defined(IMAGE_BL31) && CRASH_REPORTING 206 .quad \_name\()_cpu_reg_dump 207#endif 208 .endm 209 210#if REPORT_ERRATA 211 /* 212 * Print status of a CPU errata 213 * 214 * _chosen: 215 * Identifier indicating whether or not a CPU errata has been 216 * compiled in. 217 * _cpu: 218 * Name of the CPU 219 * _id: 220 * Errata identifier 221 * _rev_var: 222 * Register containing the combined value CPU revision and variant 223 * - typically the return value of cpu_get_rev_var 224 */ 225 .macro report_errata _chosen, _cpu, _id, _rev_var=x8 226 /* Stash a string with errata ID */ 227 .pushsection .rodata 228 \_cpu\()_errata_\_id\()_str: 229 .asciz "\_id" 230 .popsection 231 232 /* Check whether errata applies */ 233 mov x0, \_rev_var 234 bl check_errata_\_id 235 236 .ifeq \_chosen 237 /* 238 * Errata workaround has not been compiled in. If the errata would have 239 * applied had it been compiled in, print its status as missing. 240 */ 241 cbz x0, 900f 242 mov x0, #ERRATA_MISSING 243 .endif 244900: 245 adr x1, \_cpu\()_cpu_str 246 adr x2, \_cpu\()_errata_\_id\()_str 247 bl errata_print_msg 248 .endm 249#endif 250 251#endif /* __CPU_MACROS_S__ */ 252