1add40351SSoby Mathew/* 210bcd761SJeenu Viswambharan * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved. 3add40351SSoby Mathew * 4*82cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5add40351SSoby Mathew */ 6e2bf57f8SDan Handley#ifndef __CPU_MACROS_S__ 7e2bf57f8SDan Handley#define __CPU_MACROS_S__ 8add40351SSoby Mathew 9add40351SSoby Mathew#include <arch.h> 1010bcd761SJeenu Viswambharan#include <errata_report.h> 11add40351SSoby Mathew 12add40351SSoby Mathew#define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \ 13add40351SSoby Mathew (MIDR_PN_MASK << MIDR_PN_SHIFT) 14add40351SSoby Mathew 155dd9dbb5SJeenu Viswambharan/* The number of CPU operations allowed */ 165dd9dbb5SJeenu Viswambharan#define CPU_MAX_PWR_DWN_OPS 2 175dd9dbb5SJeenu Viswambharan 185dd9dbb5SJeenu Viswambharan/* Special constant to specify that CPU has no reset function */ 195dd9dbb5SJeenu Viswambharan#define CPU_NO_RESET_FUNC 0 205dd9dbb5SJeenu Viswambharan 215dd9dbb5SJeenu Viswambharan/* Word size for 64-bit CPUs */ 225dd9dbb5SJeenu Viswambharan#define CPU_WORD_SIZE 8 235dd9dbb5SJeenu Viswambharan 24add40351SSoby Mathew/* 2510bcd761SJeenu Viswambharan * Whether errata status needs reporting. Errata status is printed in debug 2610bcd761SJeenu Viswambharan * builds for both BL1 and BL31 images. 2710bcd761SJeenu Viswambharan */ 2810bcd761SJeenu Viswambharan#if (defined(IMAGE_BL1) || defined(IMAGE_BL31)) && DEBUG 2910bcd761SJeenu Viswambharan# define REPORT_ERRATA 1 3010bcd761SJeenu Viswambharan#else 3110bcd761SJeenu Viswambharan# define REPORT_ERRATA 0 3210bcd761SJeenu Viswambharan#endif 3310bcd761SJeenu Viswambharan 3410bcd761SJeenu Viswambharan /* 35add40351SSoby Mathew * Define the offsets to the fields in cpu_ops structure. 36add40351SSoby Mathew */ 37add40351SSoby Mathew .struct 0 38add40351SSoby MathewCPU_MIDR: /* cpu_ops midr */ 39add40351SSoby Mathew .space 8 40add40351SSoby Mathew/* Reset fn is needed in BL at reset vector */ 413d8256b2SMasahiro Yamada#if defined(IMAGE_BL1) || defined(IMAGE_BL31) 42add40351SSoby MathewCPU_RESET_FUNC: /* cpu_ops reset_func */ 43add40351SSoby Mathew .space 8 44add40351SSoby Mathew#endif 453d8256b2SMasahiro Yamada#ifdef IMAGE_BL31 /* The power down core and cluster is needed only in BL31 */ 465dd9dbb5SJeenu ViswambharanCPU_PWR_DWN_OPS: /* cpu_ops power down functions */ 475dd9dbb5SJeenu Viswambharan .space (8 * CPU_MAX_PWR_DWN_OPS) 48add40351SSoby Mathew#endif 4910bcd761SJeenu Viswambharan 5010bcd761SJeenu Viswambharan/* 5110bcd761SJeenu Viswambharan * Fields required to print errata status. Only in BL31 that the printing 5210bcd761SJeenu Viswambharan * require mutual exclusion and printed flag. 5310bcd761SJeenu Viswambharan */ 5410bcd761SJeenu Viswambharan#if REPORT_ERRATA 5510bcd761SJeenu ViswambharanCPU_ERRATA_FUNC: 5610bcd761SJeenu Viswambharan .space 8 5710bcd761SJeenu Viswambharan#ifdef IMAGE_BL31 5810bcd761SJeenu ViswambharanCPU_ERRATA_LOCK: 5910bcd761SJeenu Viswambharan .space 8 6010bcd761SJeenu ViswambharanCPU_ERRATA_PRINTED: 6110bcd761SJeenu Viswambharan .space 8 6210bcd761SJeenu Viswambharan#endif 6310bcd761SJeenu Viswambharan#endif 6410bcd761SJeenu Viswambharan 653d8256b2SMasahiro Yamada#if defined(IMAGE_BL31) && CRASH_REPORTING 66d3f70af6SSoby MathewCPU_REG_DUMP: /* cpu specific register dump for crash reporting */ 67d3f70af6SSoby Mathew .space 8 68d3f70af6SSoby Mathew#endif 69add40351SSoby MathewCPU_OPS_SIZE = . 70add40351SSoby Mathew 71add40351SSoby Mathew /* 725dd9dbb5SJeenu Viswambharan * Write given expressions as quad words 735dd9dbb5SJeenu Viswambharan * 745dd9dbb5SJeenu Viswambharan * _count: 755dd9dbb5SJeenu Viswambharan * Write at least _count quad words. If the given number of 765dd9dbb5SJeenu Viswambharan * expressions is less than _count, repeat the last expression to 775dd9dbb5SJeenu Viswambharan * fill _count quad words in total 785dd9dbb5SJeenu Viswambharan * _rest: 795dd9dbb5SJeenu Viswambharan * Optional list of expressions. _this is for parameter extraction 805dd9dbb5SJeenu Viswambharan * only, and has no significance to the caller 815dd9dbb5SJeenu Viswambharan * 825dd9dbb5SJeenu Viswambharan * Invoked as: 835dd9dbb5SJeenu Viswambharan * fill_constants 2, foo, bar, blah, ... 84add40351SSoby Mathew */ 855dd9dbb5SJeenu Viswambharan .macro fill_constants _count:req, _this, _rest:vararg 865dd9dbb5SJeenu Viswambharan .ifgt \_count 875dd9dbb5SJeenu Viswambharan /* Write the current expression */ 885dd9dbb5SJeenu Viswambharan .ifb \_this 895dd9dbb5SJeenu Viswambharan .error "Nothing to fill" 905dd9dbb5SJeenu Viswambharan .endif 915dd9dbb5SJeenu Viswambharan .quad \_this 925dd9dbb5SJeenu Viswambharan 935dd9dbb5SJeenu Viswambharan /* Invoke recursively for remaining expressions */ 945dd9dbb5SJeenu Viswambharan .ifnb \_rest 955dd9dbb5SJeenu Viswambharan fill_constants \_count-1, \_rest 965dd9dbb5SJeenu Viswambharan .else 975dd9dbb5SJeenu Viswambharan fill_constants \_count-1, \_this 985dd9dbb5SJeenu Viswambharan .endif 995dd9dbb5SJeenu Viswambharan .endif 1005dd9dbb5SJeenu Viswambharan .endm 1015dd9dbb5SJeenu Viswambharan 1025dd9dbb5SJeenu Viswambharan /* 1035dd9dbb5SJeenu Viswambharan * Declare CPU operations 1045dd9dbb5SJeenu Viswambharan * 1055dd9dbb5SJeenu Viswambharan * _name: 1065dd9dbb5SJeenu Viswambharan * Name of the CPU for which operations are being specified 1075dd9dbb5SJeenu Viswambharan * _midr: 1085dd9dbb5SJeenu Viswambharan * Numeric value expected to read from CPU's MIDR 1095dd9dbb5SJeenu Viswambharan * _resetfunc: 1105dd9dbb5SJeenu Viswambharan * Reset function for the CPU. If there's no CPU reset function, 1115dd9dbb5SJeenu Viswambharan * specify CPU_NO_RESET_FUNC 1125dd9dbb5SJeenu Viswambharan * _power_down_ops: 1135dd9dbb5SJeenu Viswambharan * Comma-separated list of functions to perform power-down 1145dd9dbb5SJeenu Viswambharan * operatios on the CPU. At least one, and up to 1155dd9dbb5SJeenu Viswambharan * CPU_MAX_PWR_DWN_OPS number of functions may be specified. 1165dd9dbb5SJeenu Viswambharan * Starting at power level 0, these functions shall handle power 1175dd9dbb5SJeenu Viswambharan * down at subsequent power levels. If there aren't exactly 1185dd9dbb5SJeenu Viswambharan * CPU_MAX_PWR_DWN_OPS functions, the last specified one will be 1195dd9dbb5SJeenu Viswambharan * used to handle power down at subsequent levels 1205dd9dbb5SJeenu Viswambharan */ 1215dd9dbb5SJeenu Viswambharan .macro declare_cpu_ops _name:req, _midr:req, _resetfunc:req, \ 1225dd9dbb5SJeenu Viswambharan _power_down_ops:vararg 1235dd9dbb5SJeenu Viswambharan .section cpu_ops, "a" 1245dd9dbb5SJeenu Viswambharan .align 3 125add40351SSoby Mathew .type cpu_ops_\_name, %object 126add40351SSoby Mathew .quad \_midr 1273d8256b2SMasahiro Yamada#if defined(IMAGE_BL1) || defined(IMAGE_BL31) 1285dd9dbb5SJeenu Viswambharan .quad \_resetfunc 129add40351SSoby Mathew#endif 1303d8256b2SMasahiro Yamada#ifdef IMAGE_BL31 1315dd9dbb5SJeenu Viswambharan1: 1325dd9dbb5SJeenu Viswambharan /* Insert list of functions */ 1335dd9dbb5SJeenu Viswambharan fill_constants CPU_MAX_PWR_DWN_OPS, \_power_down_ops 1345dd9dbb5SJeenu Viswambharan2: 1355dd9dbb5SJeenu Viswambharan /* 1365dd9dbb5SJeenu Viswambharan * Error if no or more than CPU_MAX_PWR_DWN_OPS were specified in the 1375dd9dbb5SJeenu Viswambharan * list 1385dd9dbb5SJeenu Viswambharan */ 1395dd9dbb5SJeenu Viswambharan .ifeq 2b - 1b 1405dd9dbb5SJeenu Viswambharan .error "At least one power down function must be specified" 1415dd9dbb5SJeenu Viswambharan .else 1425dd9dbb5SJeenu Viswambharan .iflt 2b - 1b - (CPU_MAX_PWR_DWN_OPS * CPU_WORD_SIZE) 1435dd9dbb5SJeenu Viswambharan .error "More than CPU_MAX_PWR_DWN_OPS functions specified" 1445dd9dbb5SJeenu Viswambharan .endif 1455dd9dbb5SJeenu Viswambharan .endif 146add40351SSoby Mathew#endif 14710bcd761SJeenu Viswambharan 14810bcd761SJeenu Viswambharan#if REPORT_ERRATA 14910bcd761SJeenu Viswambharan .ifndef \_name\()_cpu_str 15010bcd761SJeenu Viswambharan /* 15110bcd761SJeenu Viswambharan * Place errata reported flag, and the spinlock to arbitrate access to 15210bcd761SJeenu Viswambharan * it in the data section. 15310bcd761SJeenu Viswambharan */ 15410bcd761SJeenu Viswambharan .pushsection .data 15510bcd761SJeenu Viswambharan define_asm_spinlock \_name\()_errata_lock 15610bcd761SJeenu Viswambharan \_name\()_errata_reported: 15710bcd761SJeenu Viswambharan .word 0 15810bcd761SJeenu Viswambharan .popsection 15910bcd761SJeenu Viswambharan 16010bcd761SJeenu Viswambharan /* Place CPU string in rodata */ 16110bcd761SJeenu Viswambharan .pushsection .rodata 16210bcd761SJeenu Viswambharan \_name\()_cpu_str: 16310bcd761SJeenu Viswambharan .asciz "\_name" 16410bcd761SJeenu Viswambharan .popsection 16510bcd761SJeenu Viswambharan .endif 16610bcd761SJeenu Viswambharan 16710bcd761SJeenu Viswambharan /* 16810bcd761SJeenu Viswambharan * Weakly-bound, optional errata status printing function for CPUs of 16910bcd761SJeenu Viswambharan * this class. 17010bcd761SJeenu Viswambharan */ 17110bcd761SJeenu Viswambharan .weak \_name\()_errata_report 17210bcd761SJeenu Viswambharan .quad \_name\()_errata_report 17310bcd761SJeenu Viswambharan 17410bcd761SJeenu Viswambharan#ifdef IMAGE_BL31 17510bcd761SJeenu Viswambharan /* Pointers to errata lock and reported flag */ 17610bcd761SJeenu Viswambharan .quad \_name\()_errata_lock 17710bcd761SJeenu Viswambharan .quad \_name\()_errata_reported 17810bcd761SJeenu Viswambharan#endif 17910bcd761SJeenu Viswambharan#endif 18010bcd761SJeenu Viswambharan 1813d8256b2SMasahiro Yamada#if defined(IMAGE_BL31) && CRASH_REPORTING 182d3f70af6SSoby Mathew .quad \_name\()_cpu_reg_dump 183d3f70af6SSoby Mathew#endif 184add40351SSoby Mathew .endm 185e2bf57f8SDan Handley 18610bcd761SJeenu Viswambharan#if REPORT_ERRATA 18710bcd761SJeenu Viswambharan /* 18810bcd761SJeenu Viswambharan * Print status of a CPU errata 18910bcd761SJeenu Viswambharan * 19010bcd761SJeenu Viswambharan * _chosen: 19110bcd761SJeenu Viswambharan * Identifier indicating whether or not a CPU errata has been 19210bcd761SJeenu Viswambharan * compiled in. 19310bcd761SJeenu Viswambharan * _cpu: 19410bcd761SJeenu Viswambharan * Name of the CPU 19510bcd761SJeenu Viswambharan * _id: 19610bcd761SJeenu Viswambharan * Errata identifier 19710bcd761SJeenu Viswambharan * _rev_var: 19810bcd761SJeenu Viswambharan * Register containing the combined value CPU revision and variant 19910bcd761SJeenu Viswambharan * - typically the return value of cpu_get_rev_var 20010bcd761SJeenu Viswambharan */ 20110bcd761SJeenu Viswambharan .macro report_errata _chosen, _cpu, _id, _rev_var=x8 20210bcd761SJeenu Viswambharan /* Stash a string with errata ID */ 20310bcd761SJeenu Viswambharan .pushsection .rodata 20410bcd761SJeenu Viswambharan \_cpu\()_errata_\_id\()_str: 20510bcd761SJeenu Viswambharan .asciz "\_id" 20610bcd761SJeenu Viswambharan .popsection 20710bcd761SJeenu Viswambharan 20810bcd761SJeenu Viswambharan /* Check whether errata applies */ 20910bcd761SJeenu Viswambharan mov x0, \_rev_var 21010bcd761SJeenu Viswambharan bl check_errata_\_id 21110bcd761SJeenu Viswambharan 21210bcd761SJeenu Viswambharan .ifeq \_chosen 21310bcd761SJeenu Viswambharan /* 21410bcd761SJeenu Viswambharan * Errata workaround has not been compiled in. If the errata would have 21510bcd761SJeenu Viswambharan * applied had it been compiled in, print its status as missing. 21610bcd761SJeenu Viswambharan */ 21710bcd761SJeenu Viswambharan cbz x0, 900f 21810bcd761SJeenu Viswambharan mov x0, #ERRATA_MISSING 21910bcd761SJeenu Viswambharan .endif 22010bcd761SJeenu Viswambharan900: 22110bcd761SJeenu Viswambharan adr x1, \_cpu\()_cpu_str 22210bcd761SJeenu Viswambharan adr x2, \_cpu\()_errata_\_id\()_str 22310bcd761SJeenu Viswambharan bl errata_print_msg 22410bcd761SJeenu Viswambharan .endm 22510bcd761SJeenu Viswambharan#endif 22610bcd761SJeenu Viswambharan 227e2bf57f8SDan Handley#endif /* __CPU_MACROS_S__ */ 228