xref: /rk3399_ARM-atf/include/lib/cpus/aarch64/cortex_x925.h (revision e7be9243d071b37d13d826824ec4bb8c8b39caa2)
1 /*
2  * Copyright (c) 2023-2025, Arm Limited. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef CORTEX_X925_H
8 #define CORTEX_X925_H
9 
10 #define CORTEX_X925_MIDR					U(0x410FD850)
11 
12 /*******************************************************************************
13  * CPU Extended Control register specific definitions
14  ******************************************************************************/
15 #define CORTEX_X925_CPUECTLR_EL1				S3_0_C15_C1_4
16 #define CORTEX_X925_CPUECTLR_EL1_EXTLLC_BIT			U(0)
17 
18 /*******************************************************************************
19  * CPU Power Control register specific definitions
20  ******************************************************************************/
21 #define CORTEX_X925_CPUPWRCTLR_EL1				S3_0_C15_C2_7
22 #define CORTEX_X925_CPUPWRCTLR_EL1_CORE_PWRDN_BIT		U(1)
23 
24 /*******************************************************************************
25  * CPU Auxiliary control register 6 specific definitions
26  ******************************************************************************/
27 #define CORTEX_X925_CPUACTLR6_EL1                                S3_0_C15_C8_1
28 
29 #endif /* CORTEX_X925_H */
30