1 /* 2 * Copyright (c) 2022-2025, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef CORTEX_X4_H 8 #define CORTEX_X4_H 9 10 #define CORTEX_X4_MIDR U(0x410FD821) 11 12 /******************************************************************************* 13 * CPU Extended Control register specific definitions 14 ******************************************************************************/ 15 #define CORTEX_X4_CPUECTLR_EL1 S3_0_C15_C1_4 16 17 /******************************************************************************* 18 * CPU Power Control register specific definitions 19 ******************************************************************************/ 20 #define CORTEX_X4_CPUPWRCTLR_EL1 S3_0_C15_C2_7 21 #define CORTEX_X4_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1) 22 23 /******************************************************************************* 24 * CPU Auxiliary control register specific definitions 25 ******************************************************************************/ 26 #define CORTEX_X4_CPUACTLR_EL1 S3_0_C15_C1_0 27 #define CORTEX_X4_CPUACTLR2_EL1 S3_0_C15_C1_1 28 #define CORTEX_X4_CPUACTLR3_EL1 S3_0_C15_C1_2 29 #define CORTEX_X4_CPUACTLR4_EL1 S3_0_C15_C1_3 30 31 /******************************************************************************* 32 * CPU Auxiliary control register 5 specific definitions 33 ******************************************************************************/ 34 #define CORTEX_X4_CPUACTLR5_EL1 S3_0_C15_C8_0 35 #define CORTEX_X4_CPUACTLR5_EL1_BIT_14 (ULL(1) << 14) 36 37 /******************************************************************************* 38 * CPU Auxiliary control register 6 specific definitions 39 ******************************************************************************/ 40 #define CORTEX_X4_CPUACTLR6_EL1 S3_0_C15_C8_1 41 42 #ifndef __ASSEMBLER__ 43 #if ERRATA_X4_2726228 44 long check_erratum_cortex_x4_2726228(long cpu_rev); 45 #else 46 static inline long check_erratum_cortex_x4_2726228(long cpu_rev) 47 { 48 return 0; 49 } 50 #endif /* ERRATA_X4_2726228 */ 51 52 long check_erratum_cortex_x4_3701758(long cpu_rev); 53 #endif /* __ASSEMBLER__ */ 54 55 #endif /* CORTEX_X4_H */ 56