1 /* 2 * Copyright (c) 2023-2025, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef CORTEX_A725_H 8 #define CORTEX_A725_H 9 10 #define CORTEX_A725_MIDR U(0x410FD870) 11 12 /******************************************************************************* 13 * CPU Extended Control register specific definitions 14 ******************************************************************************/ 15 #define CORTEX_A725_CPUECTLR_EL1 S3_0_C15_C1_4 16 #define CORTEX_A725_CPUECTLR_EL1_EXTLLC_BIT U(0) 17 18 /******************************************************************************* 19 * CPU Power Control register specific definitions 20 ******************************************************************************/ 21 #define CORTEX_A725_CPUPWRCTLR_EL1 S3_0_C15_C2_7 22 #define CORTEX_A725_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1) 23 24 /******************************************************************************* 25 * CPU Auxiliary Control register specific definitions 26 ******************************************************************************/ 27 #define CORTEX_A725_CPUACTLR_EL1 S3_0_C15_C1_0 28 #define CORTEX_A725_CPUACTLR2_EL1 S3_0_C15_C1_1 29 30 #ifndef __ASSEMBLER__ 31 long check_erratum_cortex_a725_3699564(long cpu_rev); 32 #endif /* __ASSEMBLER__ */ 33 34 #endif /* CORTEX_A725_H */ 35