1 /* 2 * Copyright (c) 2024-2025, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef CORTEX_A320_H 8 #define CORTEX_A320_H 9 10 #define CORTEX_A320_MIDR U(0x410FD8F0) 11 12 /******************************************************************************* 13 * CPU Extended Control register specific definitions 14 ******************************************************************************/ 15 #define CORTEX_A320_CPUECTLR_EL1 S3_0_C15_C1_4 16 #define CORTEX_A320_CPUECTLR_EL1_EXTLLC_BIT U(0) 17 18 /******************************************************************************* 19 * CPU Power Control register specific definitions 20 ******************************************************************************/ 21 #define CORTEX_A320_CPUPWRCTLR_EL1 S3_0_C15_C2_7 22 #define CORTEX_A320_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1) 23 24 #endif /* CORTEX_A320_H */ 25