1 /* 2 * Copyright (c) 2023-2025, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef C1_PRO_H 8 #define C1_PRO_H 9 10 #include <lib/utils_def.h> 11 12 #define C1_PRO_MIDR U(0x410FD8B0) 13 14 /******************************************************************************* 15 * CPU Generic System Control register specific definitions 16 ******************************************************************************/ 17 #define C1_PRO_IMP_CPUACTLR2_EL1 S3_0_C15_C1_1 18 #define C1_PRO_IMP_CPUPSELR_EL3 S3_6_C15_C8_0 19 #define C1_PRO_IMP_CPUPCR_EL3 S3_6_C15_C8_1 20 #define C1_PRO_IMP_CPUPOR_EL3 S3_6_C15_C8_2 21 #define C1_PRO_IMP_CPUPMR_EL3 S3_6_C15_C8_3 22 23 /******************************************************************************* 24 * CPU Extended Control register specific definitions 25 ******************************************************************************/ 26 #define C1_PRO_IMP_CPUECTLR_EL1 S3_0_C15_C1_4 27 #define C1_PRO_CPUECTLR2_EL1_EXTLLC_BIT U(10) 28 29 /******************************************************************************* 30 * CPU Power Control register specific definitions 31 ******************************************************************************/ 32 #define C1_PRO_IMP_CPUPWRCTLR_EL1 S3_0_C15_C2_7 33 #define C1_PRO_IMP_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1) 34 35 #endif /* C1_PRO_H */ 36