1 /* 2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef __CORTEX_A5_H__ 8 #define __CORTEX_A5_H__ 9 10 /******************************************************************************* 11 * Cortex-A8 midr with version/revision set to 0 12 ******************************************************************************/ 13 #define CORTEX_A5_MIDR 0x410FC050 14 15 /******************************************************************************* 16 * CPU Auxiliary Control register specific definitions. 17 ******************************************************************************/ 18 #define CORTEX_A5_ACTLR_SMP_BIT (1 << 6) 19 20 #endif /* __CORTEX_A5_H__ */ 21