1 /* 2 * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef CORTEX_A15_H 8 #define CORTEX_A15_H 9 10 #include <lib/utils_def.h> 11 12 /******************************************************************************* 13 * Cortex-A15 midr with version/revision set to 0 14 ******************************************************************************/ 15 #define CORTEX_A15_MIDR U(0x410FC0F0) 16 17 /******************************************************************************* 18 * CPU Auxiliary Control register specific definitions. 19 ******************************************************************************/ 20 #define CORTEX_A15_ACTLR_INV_BTB_BIT (U(1) << 0) 21 #define CORTEX_A15_ACTLR_SMP_BIT (U(1) << 6) 22 23 #endif /* CORTEX_A15_H */ 24