1 /* 2 * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 #ifndef LIB_BL_AUX_PARAMS_H 7 #define LIB_BL_AUX_PARAMS_H 8 9 #include <stdbool.h> 10 #include <stdint.h> 11 12 /* 13 * This API implements a lightweight parameter passing mechanism that can be 14 * used to pass SoC Firmware configuration data from BL2 to BL31 by platforms or 15 * configurations that do not want to depend on libfdt. It is structured as a 16 * singly-linked list of parameter structures that all share the same common 17 * header but may have different (and differently-sized) structure bodies after 18 * that. The header contains a type field to indicate the parameter type (which 19 * is used to infer the structure length and how to interpret its contents) and 20 * a next pointer which contains the absolute physical address of the next 21 * parameter structure. The next pointer in the last structure block is set to 22 * NULL. The picture below shows how the parameters are kept in memory. 23 * 24 * head of list ---> +----------------+ --+ 25 * | type | | 26 * +----------------+ |--> struct bl_aux_param 27 * +----| next | | 28 * | +----------------+ --+ 29 * | | parameter data | 30 * | +----------------+ 31 * | 32 * +--> +----------------+ --+ 33 * | type | | 34 * +----------------+ |--> struct bl_aux_param 35 * NULL <---| next | | 36 * +----------------+ --+ 37 * | parameter data | 38 * +----------------+ 39 * 40 * Note: The SCTLR_EL3.A bit (Alignment fault check enable) is set in TF-A, so 41 * BL2 must ensure that each parameter struct starts on a 64-bit aligned address 42 * to avoid alignment faults. Parameters may be allocated in any address range 43 * accessible at the time of BL31 handoff (e.g. SRAM, DRAM, SoC-internal scratch 44 * registers, etc.), in particular address ranges that may not be mapped in 45 * BL31's page tables, so the parameter list must be parsed before the MMU is 46 * enabled and any information that is required at a later point should be 47 * deep-copied out into BL31-internal data structures. 48 */ 49 50 enum bl_aux_param_type { 51 BL_AUX_PARAM_NONE = 0, 52 BL_AUX_PARAM_VENDOR_SPECIFIC_FIRST = 0x1, 53 /* 0x1 - 0x7fffffff can be used by vendor-specific handlers. */ 54 BL_AUX_PARAM_VENDOR_SPECIFIC_LAST = 0x7fffffff, 55 BL_AUX_PARAM_GENERIC_FIRST = 0x80000001, 56 BL_AUX_PARAM_COREBOOT_TABLE = BL_AUX_PARAM_GENERIC_FIRST, 57 /* 0x80000001 - 0xffffffff are reserved for the generic handler. */ 58 BL_AUX_PARAM_GENERIC_LAST = 0xffffffff, 59 /* Top 32 bits of the type field are reserved for future use. */ 60 }; 61 62 /* common header for all BL aux parameters */ 63 struct bl_aux_param_header { 64 uint64_t type; 65 uint64_t next; 66 }; 67 68 /* commonly useful parameter structures that can be shared by multiple types */ 69 struct bl_aux_param_uint64 { 70 struct bl_aux_param_header h; 71 uint64_t value; 72 }; 73 74 struct bl_aux_gpio_info { 75 uint8_t polarity; 76 uint8_t direction; 77 uint8_t pull_mode; 78 uint8_t reserved; 79 uint32_t index; 80 }; 81 82 struct bl_aux_param_gpio { 83 struct bl_aux_param_header h; 84 struct bl_aux_gpio_info gpio; 85 }; 86 87 /* 88 * Handler function that handles an individual aux parameter. Return true if 89 * the parameter was handled, and flase if bl_aux_params_parse() should make its 90 * own attempt at handling it (for generic parameters). 91 */ 92 typedef bool (*bl_aux_param_handler_t)(struct bl_aux_param_header *param); 93 94 /* 95 * Interprets head as the start of an aux parameter list, and passes the 96 * parameters individually to handler(). Handles generic parameters directly if 97 * handler() hasn't already done so. If only generic parameters are expected, 98 * handler() can be NULL. 99 */ 100 void bl_aux_params_parse(u_register_t head, 101 bl_aux_param_handler_t handler); 102 103 #endif /* LIB_BL_AUX_PARAMS_H */ 104