xref: /rk3399_ARM-atf/include/dt-bindings/soc/rif.h (revision 3ba36ea07ca22c748b5adcf5d9bff00e752681d7)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2 /*
3  * Copyright (C) 2025, STMicroelectronics - All Rights Reserved
4  *
5  */
6 
7 #ifndef _DT_BINDINGS_RIF_H
8 #define _DT_BINDINGS_RIF_H
9 
10 /* RIFSC CIDs */
11 #define RIF_CID0		0x0
12 #define RIF_CID1		0x1
13 #define RIF_CID2		0x2
14 #define RIF_CID3		0x3
15 #define RIF_CID4		0x4
16 #define RIF_CID5		0x5
17 #define RIF_CID6		0x6
18 #define RIF_CID7		0x7
19 #define RIF_CID_MAX		0x8
20 
21 /* RIFSC semaphore list */
22 #define EMPTY_SEMWL		0x0
23 #define RIF_CID0_BF		BIT_32(RIF_CID0)
24 #define RIF_CID1_BF		BIT_32(RIF_CID1)
25 #define RIF_CID2_BF		BIT_32(RIF_CID2)
26 #define RIF_CID3_BF		BIT_32(RIF_CID3)
27 #define RIF_CID4_BF		BIT_32(RIF_CID4)
28 #define RIF_CID5_BF		BIT_32(RIF_CID5)
29 #define RIF_CID6_BF		BIT_32(RIF_CID6)
30 #define RIF_CID7_BF		BIT_32(RIF_CID7)
31 
32 /* RIFSC secure levels */
33 #define RIF_NSEC		0x0
34 #define RIF_SEC			0x1
35 
36 /* RIFSC privilege levels */
37 #define RIF_NPRIV		0x0
38 #define RIF_PRIV		0x1
39 
40 /* RIFSC semaphore modes */
41 #define RIF_SEM_DIS		0x0
42 #define RIF_SEM_EN		0x1
43 
44 /* RIFSC CID filtering modes */
45 #define RIF_CFDIS		0x0
46 #define RIF_CFEN		0x1
47 
48 /* RIFSC lock states */
49 #define RIF_UNLOCK		0x0
50 #define RIF_LOCK		0x1
51 
52 /* Used when a field in a macro has no impact */
53 #define RIF_UNUSED		0x0
54 
55 #define RIFPROT(rifid, sem_list, sec, priv, scid, sem_en, cfen) \
56 	(((rifid) << 24) | ((sem_list) << 16) | ((priv) << 9) | ((sec) << 8) | ((scid) << 4) | \
57 	 ((sem_en) << 1) | (cfen))
58 
59 /* Masters IDs */
60 #define RIMU_ID(idx)		(idx)
61 
62 /* Master configuration modes */
63 #define RIF_CIDSEL_P		0x0 /* Config from RISUP */
64 #define RIF_CIDSEL_M		0x1 /* Config from RIMU */
65 
66 #define RIMUPROT(rimuid, scid, sec, priv, mode) \
67 	(((rimuid) << 16) | ((priv) << 9) | ((sec) << 8) | ((scid) << 4) | ((mode) << 2))
68 
69 /* RISAF region IDs */
70 #define RISAF_REG_ID(idx)	(idx)
71 
72 /* RISAF base region enable modes */
73 #define RIF_BREN_DIS		0x0
74 #define RIF_BREN_EN		0x1
75 
76 /* RISAF encryption modes */
77 #define RIF_ENC_DIS		0x0
78 #define RIF_ENC_EN		0x1
79 
80 #define RISAFPROT(risaf_region, cid_read_list, cid_write_list, cid_priv_list, sec, enc, enabled) \
81 	(((cid_write_list) << 24) | ((cid_read_list) << 16) | ((cid_priv_list) << 8) | \
82 	 ((enc) << 7) | ((sec) << 6) | ((enabled) << 5) | (risaf_region))
83 
84 /* RISAB page IDs */
85 #define RISAB_PAGE_ID(idx)	(idx)
86 
87 /* RISAB control modes */
88 #define RIF_DDCID_DIS		0x0
89 #define RIF_DDCID_EN		0x1
90 
91 #define RISABPROT(risab_page, delegate_en, delegate_cid, sec, default_priv, cid_read_list, \
92 		  cid_write_list, cid_priv_list, enabled) \
93 	(((risab_page) << 24) | ((default_priv) << 9) | ((sec) << 8) | ((delegate_cid) << 4) | \
94 	 ((delegate_en) << 2) | (enabled)) \
95 	((cid_write_list) << 16 | (cid_read_list) << 8 | (cid_priv_list))
96 
97 #endif /* _DT_BINDINGS_RIF_H */
98