1*1b8898ebSYann Gautier /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */ 2*1b8898ebSYann Gautier /* 3*1b8898ebSYann Gautier * Copyright (C) STMicroelectronics 2022 - All Rights Reserved 4*1b8898ebSYann Gautier * Author: Gabriel Fernandez <gabriel.fernandez@st.com> for STMicroelectronics. 5*1b8898ebSYann Gautier */ 6*1b8898ebSYann Gautier 7*1b8898ebSYann Gautier #ifndef _DT_BINDINGS_STM32MP13_RESET_H_ 8*1b8898ebSYann Gautier #define _DT_BINDINGS_STM32MP13_RESET_H_ 9*1b8898ebSYann Gautier 10*1b8898ebSYann Gautier #define TIM2_R 13568 11*1b8898ebSYann Gautier #define TIM3_R 13569 12*1b8898ebSYann Gautier #define TIM4_R 13570 13*1b8898ebSYann Gautier #define TIM5_R 13571 14*1b8898ebSYann Gautier #define TIM6_R 13572 15*1b8898ebSYann Gautier #define TIM7_R 13573 16*1b8898ebSYann Gautier #define LPTIM1_R 13577 17*1b8898ebSYann Gautier #define SPI2_R 13579 18*1b8898ebSYann Gautier #define SPI3_R 13580 19*1b8898ebSYann Gautier #define USART3_R 13583 20*1b8898ebSYann Gautier #define UART4_R 13584 21*1b8898ebSYann Gautier #define UART5_R 13585 22*1b8898ebSYann Gautier #define UART7_R 13586 23*1b8898ebSYann Gautier #define UART8_R 13587 24*1b8898ebSYann Gautier #define I2C1_R 13589 25*1b8898ebSYann Gautier #define I2C2_R 13590 26*1b8898ebSYann Gautier #define SPDIF_R 13594 27*1b8898ebSYann Gautier #define TIM1_R 13632 28*1b8898ebSYann Gautier #define TIM8_R 13633 29*1b8898ebSYann Gautier #define SPI1_R 13640 30*1b8898ebSYann Gautier #define USART6_R 13645 31*1b8898ebSYann Gautier #define SAI1_R 13648 32*1b8898ebSYann Gautier #define SAI2_R 13649 33*1b8898ebSYann Gautier #define DFSDM_R 13652 34*1b8898ebSYann Gautier #define FDCAN_R 13656 35*1b8898ebSYann Gautier #define LPTIM2_R 13696 36*1b8898ebSYann Gautier #define LPTIM3_R 13697 37*1b8898ebSYann Gautier #define LPTIM4_R 13698 38*1b8898ebSYann Gautier #define LPTIM5_R 13699 39*1b8898ebSYann Gautier #define SYSCFG_R 13707 40*1b8898ebSYann Gautier #define VREF_R 13709 41*1b8898ebSYann Gautier #define DTS_R 13712 42*1b8898ebSYann Gautier #define PMBCTRL_R 13713 43*1b8898ebSYann Gautier #define LTDC_R 13760 44*1b8898ebSYann Gautier #define DCMIPP_R 13761 45*1b8898ebSYann Gautier #define DDRPERFM_R 13768 46*1b8898ebSYann Gautier #define USBPHY_R 13776 47*1b8898ebSYann Gautier #define STGEN_R 13844 48*1b8898ebSYann Gautier #define USART1_R 13888 49*1b8898ebSYann Gautier #define USART2_R 13889 50*1b8898ebSYann Gautier #define SPI4_R 13890 51*1b8898ebSYann Gautier #define SPI5_R 13891 52*1b8898ebSYann Gautier #define I2C3_R 13892 53*1b8898ebSYann Gautier #define I2C4_R 13893 54*1b8898ebSYann Gautier #define I2C5_R 13894 55*1b8898ebSYann Gautier #define TIM12_R 13895 56*1b8898ebSYann Gautier #define TIM13_R 13896 57*1b8898ebSYann Gautier #define TIM14_R 13897 58*1b8898ebSYann Gautier #define TIM15_R 13898 59*1b8898ebSYann Gautier #define TIM16_R 13899 60*1b8898ebSYann Gautier #define TIM17_R 13900 61*1b8898ebSYann Gautier #define DMA1_R 13952 62*1b8898ebSYann Gautier #define DMA2_R 13953 63*1b8898ebSYann Gautier #define DMAMUX1_R 13954 64*1b8898ebSYann Gautier #define DMA3_R 13955 65*1b8898ebSYann Gautier #define DMAMUX2_R 13956 66*1b8898ebSYann Gautier #define ADC1_R 13957 67*1b8898ebSYann Gautier #define ADC2_R 13958 68*1b8898ebSYann Gautier #define USBO_R 13960 69*1b8898ebSYann Gautier #define GPIOA_R 14080 70*1b8898ebSYann Gautier #define GPIOB_R 14081 71*1b8898ebSYann Gautier #define GPIOC_R 14082 72*1b8898ebSYann Gautier #define GPIOD_R 14083 73*1b8898ebSYann Gautier #define GPIOE_R 14084 74*1b8898ebSYann Gautier #define GPIOF_R 14085 75*1b8898ebSYann Gautier #define GPIOG_R 14086 76*1b8898ebSYann Gautier #define GPIOH_R 14087 77*1b8898ebSYann Gautier #define GPIOI_R 14088 78*1b8898ebSYann Gautier #define TSC_R 14095 79*1b8898ebSYann Gautier #define PKA_R 14146 80*1b8898ebSYann Gautier #define SAES_R 14147 81*1b8898ebSYann Gautier #define CRYP1_R 14148 82*1b8898ebSYann Gautier #define HASH1_R 14149 83*1b8898ebSYann Gautier #define RNG1_R 14150 84*1b8898ebSYann Gautier #define AXIMC_R 14160 85*1b8898ebSYann Gautier #define MDMA_R 14208 86*1b8898ebSYann Gautier #define MCE_R 14209 87*1b8898ebSYann Gautier #define ETH1MAC_R 14218 88*1b8898ebSYann Gautier #define FMC_R 14220 89*1b8898ebSYann Gautier #define QSPI_R 14222 90*1b8898ebSYann Gautier #define SDMMC1_R 14224 91*1b8898ebSYann Gautier #define SDMMC2_R 14225 92*1b8898ebSYann Gautier #define CRC1_R 14228 93*1b8898ebSYann Gautier #define USBH_R 14232 94*1b8898ebSYann Gautier #define ETH2MAC_R 14238 95*1b8898ebSYann Gautier 96*1b8898ebSYann Gautier #endif /* _DT_BINDINGS_STM32MP13_RESET_H_ */ 97