xref: /rk3399_ARM-atf/include/dt-bindings/interrupt-controller/arm-gicv5.h (revision a9bb1f1731554d738cdee183a2fec911d94010d1)
1*d358eb21SBoyan Karatotev /*
2*d358eb21SBoyan Karatotev  * Copyright (c) 2025, Arm Limited and Contributors. All rights reserved.
3*d358eb21SBoyan Karatotev  *
4*d358eb21SBoyan Karatotev  * SPDX-License-Identifier: BSD-3-Clause
5*d358eb21SBoyan Karatotev  */
6*d358eb21SBoyan Karatotev 
7*d358eb21SBoyan Karatotev #ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GICV5_H
8*d358eb21SBoyan Karatotev #define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GICV5_H
9*d358eb21SBoyan Karatotev 
10*d358eb21SBoyan Karatotev #include <dt-bindings/interrupt-controller/irq.h>
11*d358eb21SBoyan Karatotev 
12*d358eb21SBoyan Karatotev /* interrupt specifier cell 0 - matches the values in the GICv5 specification */
13*d358eb21SBoyan Karatotev 
14*d358eb21SBoyan Karatotev #define GIC_PPI 1
15*d358eb21SBoyan Karatotev #define GIC_LPI 2
16*d358eb21SBoyan Karatotev #define GIC_SPI 3
17*d358eb21SBoyan Karatotev 
18*d358eb21SBoyan Karatotev #endif
19