1 /* 2 * Copyright (c) 2019-2021, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * This header provides constants for the ARM GIC. 7 */ 8 9 #ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H 10 #define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H 11 12 /* interrupt specifier cell 0 */ 13 14 #define GIC_SPI 0 15 #define GIC_PPI 1 16 17 #define IRQ_TYPE_NONE 0 18 #define IRQ_TYPE_EDGE_RISING 1 19 #define IRQ_TYPE_EDGE_FALLING 2 20 #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING) 21 #define IRQ_TYPE_LEVEL_HIGH 4 22 #define IRQ_TYPE_LEVEL_LOW 8 23 24 /* 25 * Interrupt specifier cell 2. 26 */ 27 #define GIC_CPU_MASK_RAW(x) ((x) << 8) 28 29 #endif 30