1*615f31feSGabriel Fernandez /* 2*615f31feSGabriel Fernandez * Copyright (C) 2024, STMicroelectronics - All Rights Reserved 3*615f31feSGabriel Fernandez * 4*615f31feSGabriel Fernandez * SPDX-License-Identifier: BSD-3-Clause 5*615f31feSGabriel Fernandez */ 6*615f31feSGabriel Fernandez 7*615f31feSGabriel Fernandez #ifndef STM32MP2_CLK_H 8*615f31feSGabriel Fernandez #define STM32MP2_CLK_H 9*615f31feSGabriel Fernandez 10*615f31feSGabriel Fernandez #include <platform_def.h> 11*615f31feSGabriel Fernandez 12*615f31feSGabriel Fernandez enum stm32mp_osc_id { 13*615f31feSGabriel Fernandez _HSI, 14*615f31feSGabriel Fernandez _HSE, 15*615f31feSGabriel Fernandez _CSI, 16*615f31feSGabriel Fernandez _LSI, 17*615f31feSGabriel Fernandez _LSE, 18*615f31feSGabriel Fernandez _I2S_CKIN, 19*615f31feSGabriel Fernandez _SPDIF_SYMB, 20*615f31feSGabriel Fernandez NB_OSC, 21*615f31feSGabriel Fernandez _UNKNOWN_OSC_ID = 0xFF 22*615f31feSGabriel Fernandez }; 23*615f31feSGabriel Fernandez 24*615f31feSGabriel Fernandez extern const char *stm32mp_osc_node_label[NB_OSC]; 25*615f31feSGabriel Fernandez 26*615f31feSGabriel Fernandez enum pll_cfg { 27*615f31feSGabriel Fernandez FBDIV, 28*615f31feSGabriel Fernandez REFDIV, 29*615f31feSGabriel Fernandez POSTDIV1, 30*615f31feSGabriel Fernandez POSTDIV2, 31*615f31feSGabriel Fernandez PLLCFG_NB 32*615f31feSGabriel Fernandez }; 33*615f31feSGabriel Fernandez 34*615f31feSGabriel Fernandez enum pll_csg { 35*615f31feSGabriel Fernandez DIVVAL, 36*615f31feSGabriel Fernandez SPREAD, 37*615f31feSGabriel Fernandez DOWNSPREAD, 38*615f31feSGabriel Fernandez PLLCSG_NB 39*615f31feSGabriel Fernandez }; 40*615f31feSGabriel Fernandez 41*615f31feSGabriel Fernandez int stm32mp2_clk_init(void); 42*615f31feSGabriel Fernandez int stm32mp2_pll1_disable(void); 43*615f31feSGabriel Fernandez 44*615f31feSGabriel Fernandez #endif /* STM32MP2_CLK_H */ 45