xref: /rk3399_ARM-atf/include/drivers/st/stm32mp1_clk.h (revision 7839a050909944bd3ee6a70245a2bcc5471b3507)
1*7839a050SYann Gautier /*
2*7839a050SYann Gautier  * Copyright (c) 2018, STMicroelectronics - All Rights Reserved
3*7839a050SYann Gautier  *
4*7839a050SYann Gautier  * SPDX-License-Identifier: BSD-3-Clause
5*7839a050SYann Gautier  */
6*7839a050SYann Gautier 
7*7839a050SYann Gautier #ifndef __STM32MP1_CLK_H__
8*7839a050SYann Gautier #define __STM32MP1_CLK_H__
9*7839a050SYann Gautier 
10*7839a050SYann Gautier #include <arch_helpers.h>
11*7839a050SYann Gautier #include <stdbool.h>
12*7839a050SYann Gautier 
13*7839a050SYann Gautier int stm32mp1_clk_probe(void);
14*7839a050SYann Gautier int stm32mp1_clk_init(void);
15*7839a050SYann Gautier bool stm32mp1_clk_is_enabled(unsigned long id);
16*7839a050SYann Gautier int stm32mp1_clk_enable(unsigned long id);
17*7839a050SYann Gautier int stm32mp1_clk_disable(unsigned long id);
18*7839a050SYann Gautier unsigned long stm32mp1_clk_get_rate(unsigned long id);
19*7839a050SYann Gautier void stm32mp1_stgen_increment(unsigned long long offset_in_ms);
20*7839a050SYann Gautier 
21*7839a050SYann Gautier static inline uint32_t get_timer(uint32_t base)
22*7839a050SYann Gautier {
23*7839a050SYann Gautier 	if (base == 0U) {
24*7839a050SYann Gautier 		return (uint32_t)(~read_cntpct_el0());
25*7839a050SYann Gautier 	}
26*7839a050SYann Gautier 
27*7839a050SYann Gautier 	return base - (uint32_t)(~read_cntpct_el0());
28*7839a050SYann Gautier }
29*7839a050SYann Gautier 
30*7839a050SYann Gautier #endif /* __STM32MP1_CLK_H__ */
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