1 /* 2 * Copyright (c) 2021, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef STM32_UART_H 8 #define STM32_UART_H 9 10 /* UART word length */ 11 #define STM32_UART_WORDLENGTH_7B USART_CR1_M1 12 #define STM32_UART_WORDLENGTH_8B 0x00000000U 13 #define STM32_UART_WORDLENGTH_9B USART_CR1_M0 14 15 /* UART number of stop bits */ 16 #define STM32_UART_STOPBITS_0_5 USART_CR2_STOP_0 17 #define STM32_UART_STOPBITS_1 0x00000000U 18 #define STM32_UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) 19 #define STM32_UART_STOPBITS_2 USART_CR2_STOP_1 20 21 /* UART parity */ 22 #define STM32_UART_PARITY_NONE 0x00000000U 23 #define STM32_UART_PARITY_EVEN USART_CR1_PCE 24 #define STM32_UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) 25 26 /* UART transfer mode */ 27 #define STM32_UART_MODE_RX USART_CR1_RE 28 #define STM32_UART_MODE_TX USART_CR1_TE 29 #define STM32_UART_MODE_TX_RX (USART_CR1_TE | USART_CR1_RE) 30 31 /* UART hardware flow control */ 32 #define STM32_UART_HWCONTROL_NONE 0x00000000U 33 #define STM32_UART_HWCONTROL_RTS USART_CR3_RTSE 34 #define STM32_UART_HWCONTROL_CTS USART_CR3_CTSE 35 #define STM32_UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) 36 37 /* UART over sampling */ 38 #define STM32_UART_OVERSAMPLING_16 0x00000000U 39 #define STM32_UART_OVERSAMPLING_8 USART_CR1_OVER8 40 41 /* UART prescaler */ 42 #define STM32_UART_PRESCALER_DIV1 0x00000000U 43 #define STM32_UART_PRESCALER_DIV2 0x00000001U 44 #define STM32_UART_PRESCALER_DIV4 0x00000002U 45 #define STM32_UART_PRESCALER_DIV6 0x00000003U 46 #define STM32_UART_PRESCALER_DIV8 0x00000004U 47 #define STM32_UART_PRESCALER_DIV10 0x00000005U 48 #define STM32_UART_PRESCALER_DIV12 0x00000006U 49 #define STM32_UART_PRESCALER_DIV16 0x00000007U 50 #define STM32_UART_PRESCALER_DIV32 0x00000008U 51 #define STM32_UART_PRESCALER_DIV64 0x00000009U 52 #define STM32_UART_PRESCALER_DIV128 0x0000000AU 53 #define STM32_UART_PRESCALER_DIV256 0x0000000BU 54 #define STM32_UART_PRESCALER_NB 0x0000000CU 55 56 /* UART fifo mode */ 57 #define STM32_UART_FIFOMODE_EN USART_CR1_FIFOEN 58 #define STM32_UART_FIFOMODE_DIS 0x00000000U 59 60 /* UART TXFIFO threshold level */ 61 #define STM32_UART_TXFIFO_THRESHOLD_1EIGHTHFULL 0x00000000U 62 #define STM32_UART_TXFIFO_THRESHOLD_1QUARTERFUL USART_CR3_TXFTCFG_0 63 #define STM32_UART_TXFIFO_THRESHOLD_HALFFULL USART_CR3_TXFTCFG_1 64 #define STM32_UART_TXFIFO_THRESHOLD_3QUARTERSFULL (USART_CR3_TXFTCFG_0 | USART_CR3_TXFTCFG_1) 65 #define STM32_UART_TXFIFO_THRESHOLD_7EIGHTHFULL USART_CR3_TXFTCFG_2 66 #define STM32_UART_TXFIFO_THRESHOLD_EMPTY (USART_CR3_TXFTCFG_2 | USART_CR3_TXFTCFG_0) 67 68 /* UART RXFIFO threshold level */ 69 #define STM32_UART_RXFIFO_THRESHOLD_1EIGHTHFULL 0x00000000U 70 #define STM32_UART_RXFIFO_THRESHOLD_1QUARTERFULL USART_CR3_RXFTCFG_0 71 #define STM32_UART_RXFIFO_THRESHOLD_HALFFULL USART_CR3_RXFTCFG_1 72 #define STM32_UART_RXFIFO_THRESHOLD_3QUARTERSFULL (USART_CR3_RXFTCFG_0 | USART_CR3_RXFTCFG_1) 73 #define STM32_UART_RXFIFO_THRESHOLD_7EIGHTHFULL USART_CR3_RXFTCFG_2 74 #define STM32_UART_RXFIFO_THRESHOLD_FULL (USART_CR3_RXFTCFG_2 | USART_CR3_RXFTCFG_0) 75 76 struct stm32_uart_init_s { 77 uint32_t baud_rate; /* 78 * Configures the UART communication 79 * baud rate. 80 */ 81 82 uint32_t word_length; /* 83 * Specifies the number of data bits 84 * transmitted or received in a frame. 85 * This parameter can be a value of 86 * @ref STM32_UART_WORDLENGTH_*. 87 */ 88 89 uint32_t stop_bits; /* 90 * Specifies the number of stop bits 91 * transmitted. This parameter can be 92 * a value of @ref STM32_UART_STOPBITS_*. 93 */ 94 95 uint32_t parity; /* 96 * Specifies the parity mode. 97 * This parameter can be a value of 98 * @ref STM32_UART_PARITY_*. 99 */ 100 101 uint32_t mode; /* 102 * Specifies whether the receive or 103 * transmit mode is enabled or 104 * disabled. This parameter can be a 105 * value of @ref @ref STM32_UART_MODE_*. 106 */ 107 108 uint32_t hw_flow_control; /* 109 * Specifies whether the hardware flow 110 * control mode is enabled or 111 * disabled. This parameter can be a 112 * value of @ref STM32_UARTHWCONTROL_*. 113 */ 114 115 uint32_t over_sampling; /* 116 * Specifies whether the over sampling 117 * 8 is enabled or disabled. 118 * This parameter can be a value of 119 * @ref STM32_UART_OVERSAMPLING_*. 120 */ 121 122 uint32_t one_bit_sampling; /* 123 * Specifies whether a single sample 124 * or three samples' majority vote is 125 * selected. This parameter can be 0 126 * or USART_CR3_ONEBIT. 127 */ 128 129 uint32_t prescaler; /* 130 * Specifies the prescaler value used 131 * to divide the UART clock source. 132 * This parameter can be a value of 133 * @ref STM32_UART_PRESCALER_*. 134 */ 135 136 uint32_t fifo_mode; /* 137 * Specifies if the FIFO mode will be 138 * used. This parameter can be a value 139 * of @ref STM32_UART_FIFOMODE_*. 140 */ 141 142 uint32_t tx_fifo_threshold; /* 143 * Specifies the TXFIFO threshold 144 * level. This parameter can be a 145 * value of @ref 146 * STM32_UART_TXFIFO_THRESHOLD_*. 147 */ 148 149 uint32_t rx_fifo_threshold; /* 150 * Specifies the RXFIFO threshold 151 * level. This parameter can be a 152 * value of @ref 153 * STM32_UART_RXFIFO_THRESHOLD_*. 154 */ 155 }; 156 157 struct stm32_uart_handle_s { 158 uint32_t base; 159 uint32_t rdr_mask; 160 }; 161 162 int stm32_uart_init(struct stm32_uart_handle_s *huart, 163 uintptr_t base_addr, 164 const struct stm32_uart_init_s *init); 165 void stm32_uart_stop(uintptr_t base_addr); 166 int stm32_uart_putc(struct stm32_uart_handle_s *huart, int c); 167 int stm32_uart_flush(struct stm32_uart_handle_s *huart); 168 int stm32_uart_getc(struct stm32_uart_handle_s *huart); 169 170 #endif /* STM32_UART_H */ 171