16a339a49SYann Gautier /* 2*bfa5f61bSPascal Paillet * Copyright (c) 2015-2024, STMicroelectronics - All Rights Reserved 36a339a49SYann Gautier * 46a339a49SYann Gautier * SPDX-License-Identifier: BSD-3-Clause 56a339a49SYann Gautier */ 66a339a49SYann Gautier 7c3cf06f1SAntonio Nino Diaz #ifndef STM32_GPIO_H 8c3cf06f1SAntonio Nino Diaz #define STM32_GPIO_H 96a339a49SYann Gautier 1009d40e0eSAntonio Nino Diaz #include <lib/utils_def.h> 116a339a49SYann Gautier 126a339a49SYann Gautier #define GPIO_MODE_OFFSET U(0x00) 136a339a49SYann Gautier #define GPIO_TYPE_OFFSET U(0x04) 146a339a49SYann Gautier #define GPIO_SPEED_OFFSET U(0x08) 156a339a49SYann Gautier #define GPIO_PUPD_OFFSET U(0x0C) 16*bfa5f61bSPascal Paillet #define GPIO_IDR_OFFSET U(0x10) 1753584e1dSFabien Dessenne #define GPIO_OD_OFFSET U(0x14) 186a339a49SYann Gautier #define GPIO_BSRR_OFFSET U(0x18) 196a339a49SYann Gautier #define GPIO_AFRL_OFFSET U(0x20) 206a339a49SYann Gautier #define GPIO_AFRH_OFFSET U(0x24) 211fc2130cSYann Gautier #define GPIO_SECR_OFFSET U(0x30) 226a339a49SYann Gautier 236a339a49SYann Gautier #define GPIO_ALT_LOWER_LIMIT U(0x08) 246a339a49SYann Gautier 251fc2130cSYann Gautier #define GPIO_PIN_(_x) U(_x) 261fc2130cSYann Gautier #define GPIO_PIN_MAX GPIO_PIN_(15) 276a339a49SYann Gautier 281fc2130cSYann Gautier #define GPIO_ALTERNATE_(_x) U(_x) 296a339a49SYann Gautier #define GPIO_ALTERNATE_MASK U(0x0F) 306a339a49SYann Gautier 31417196faSFabien Dessenne #define GPIO_MODE_INPUT U(0x00) 32417196faSFabien Dessenne #define GPIO_MODE_OUTPUT U(0x01) 33417196faSFabien Dessenne #define GPIO_MODE_ALTERNATE U(0x02) 34417196faSFabien Dessenne #define GPIO_MODE_ANALOG U(0x03) 356a339a49SYann Gautier #define GPIO_MODE_MASK U(0x03) 366a339a49SYann Gautier 37417196faSFabien Dessenne #define GPIO_TYPE_PUSH_PULL U(0x00) 38417196faSFabien Dessenne #define GPIO_TYPE_OPEN_DRAIN U(0x01) 39417196faSFabien Dessenne #define GPIO_TYPE_MASK U(0x01) 406a339a49SYann Gautier 41417196faSFabien Dessenne #define GPIO_SPEED_LOW U(0x00) 42417196faSFabien Dessenne #define GPIO_SPEED_MEDIUM U(0x01) 43417196faSFabien Dessenne #define GPIO_SPEED_HIGH U(0x02) 44417196faSFabien Dessenne #define GPIO_SPEED_VERY_HIGH U(0x03) 456a339a49SYann Gautier #define GPIO_SPEED_MASK U(0x03) 466a339a49SYann Gautier 47417196faSFabien Dessenne #define GPIO_NO_PULL U(0x00) 48417196faSFabien Dessenne #define GPIO_PULL_UP U(0x01) 49417196faSFabien Dessenne #define GPIO_PULL_DOWN U(0x02) 506a339a49SYann Gautier #define GPIO_PULL_MASK U(0x03) 516a339a49SYann Gautier 5253584e1dSFabien Dessenne #define GPIO_OD_OUTPUT_LOW U(0x00) 5353584e1dSFabien Dessenne #define GPIO_OD_OUTPUT_HIGH U(0x01) 5453584e1dSFabien Dessenne #define GPIO_OD_MASK U(0x01) 5553584e1dSFabien Dessenne 56d5dfdeb6SJulius Werner #ifndef __ASSEMBLER__ 576a339a49SYann Gautier #include <stdint.h> 586a339a49SYann Gautier 591fc2130cSYann Gautier int dt_set_pinctrl_config(int node); 601fc2130cSYann Gautier void set_gpio_secure_cfg(uint32_t bank, uint32_t pin, bool secure); 61737ad29bSYann Gautier void set_gpio_reset_cfg(uint32_t bank, uint32_t pin); 62*bfa5f61bSPascal Paillet 63*bfa5f61bSPascal Paillet enum gpio_level { 64*bfa5f61bSPascal Paillet GPIO_LEVEL_LOW, 65*bfa5f61bSPascal Paillet GPIO_LEVEL_HIGH 66*bfa5f61bSPascal Paillet }; 67*bfa5f61bSPascal Paillet 68*bfa5f61bSPascal Paillet void set_gpio_level(uint32_t bank, uint32_t pin, enum gpio_level level); 69*bfa5f61bSPascal Paillet enum gpio_level get_gpio_level(uint32_t bank, uint32_t pin); 70*bfa5f61bSPascal Paillet 71*bfa5f61bSPascal Paillet void set_gpio_config(uint32_t bank, uint32_t pin, uint32_t config, uint8_t status); 72d5dfdeb6SJulius Werner #endif /*__ASSEMBLER__*/ 736a339a49SYann Gautier 74c3cf06f1SAntonio Nino Diaz #endif /* STM32_GPIO_H */ 75