xref: /rk3399_ARM-atf/include/drivers/st/bsec.h (revision 072d7532d2cd3d004a7cc09fd15e9543d0a3bbb7)
188ef0425SYann Gautier /*
2*072d7532SNicolas Le Bayon  * Copyright (c) 2017-2022, STMicroelectronics - All Rights Reserved
388ef0425SYann Gautier  *
488ef0425SYann Gautier  * SPDX-License-Identifier: BSD-3-Clause
588ef0425SYann Gautier  */
688ef0425SYann Gautier 
788ef0425SYann Gautier #ifndef BSEC_H
888ef0425SYann Gautier #define BSEC_H
988ef0425SYann Gautier 
1088ef0425SYann Gautier #include <stdbool.h>
1188ef0425SYann Gautier #include <stdint.h>
1288ef0425SYann Gautier 
1388ef0425SYann Gautier #include <lib/utils_def.h>
1488ef0425SYann Gautier 
1588ef0425SYann Gautier /*
1688ef0425SYann Gautier  * IP configuration
1788ef0425SYann Gautier  */
1888ef0425SYann Gautier #define BSEC_OTP_MASK			GENMASK(4, 0)
1988ef0425SYann Gautier #define BSEC_OTP_BANK_SHIFT		5
2088ef0425SYann Gautier #define BSEC_TIMEOUT_VALUE		0xFFFF
2188ef0425SYann Gautier 
2288ef0425SYann Gautier /*
2388ef0425SYann Gautier  * Return status
2488ef0425SYann Gautier  */
2588ef0425SYann Gautier #define BSEC_OK				0U
2688ef0425SYann Gautier #define BSEC_ERROR			0xFFFFFFFFU
2788ef0425SYann Gautier #define BSEC_DISTURBED			0xFFFFFFFEU
2888ef0425SYann Gautier #define BSEC_INVALID_PARAM		0xFFFFFFFCU
2988ef0425SYann Gautier #define BSEC_PROG_FAIL			0xFFFFFFFBU
3088ef0425SYann Gautier #define BSEC_LOCK_FAIL			0xFFFFFFFAU
31*072d7532SNicolas Le Bayon #define BSEC_TIMEOUT			0xFFFFFFF9U
32*072d7532SNicolas Le Bayon #define BSEC_RETRY			0xFFFFFFF8U
33*072d7532SNicolas Le Bayon #define BSEC_NOT_SUPPORTED		0xFFFFFFF7U
34*072d7532SNicolas Le Bayon #define BSEC_WRITE_LOCKED		0xFFFFFFF6U
35*072d7532SNicolas Le Bayon #define BSEC_ERROR_INVALID_FVR		0xFFFFFFF5U
3688ef0425SYann Gautier 
3788ef0425SYann Gautier /*
38*072d7532SNicolas Le Bayon  * OTP MODE
3988ef0425SYann Gautier  */
40*072d7532SNicolas Le Bayon #define BSEC_MODE_OPEN1			0x00U
41*072d7532SNicolas Le Bayon #define BSEC_MODE_SECURED		0x01U
42*072d7532SNicolas Le Bayon #define BSEC_MODE_OPEN2			0x02U
43*072d7532SNicolas Le Bayon #define BSEC_MODE_INVALID		0x04U
4488ef0425SYann Gautier 
4588ef0425SYann Gautier /*
46*072d7532SNicolas Le Bayon  * OTP Lock services definition.
47*072d7532SNicolas Le Bayon  * Value must corresponding to the bit number in the register.
48*072d7532SNicolas Le Bayon  * Special case: (bit number << 1) for BSEC3.
4988ef0425SYann Gautier  */
5088ef0425SYann Gautier #define BSEC_LOCK_UPPER_OTP		0x00
51*072d7532SNicolas Le Bayon #define BSEC_LOCK_GWLOCK		0x01
5288ef0425SYann Gautier #define BSEC_LOCK_DEBUG			0x02
5388ef0425SYann Gautier #define BSEC_LOCK_PROGRAM		0x03
54*072d7532SNicolas Le Bayon #define BSEC_LOCK_KVLOCK		0x04
5588ef0425SYann Gautier 
56*072d7532SNicolas Le Bayon /*
57*072d7532SNicolas Le Bayon  * Values for struct bsec_config::freq
58*072d7532SNicolas Le Bayon  */
5988ef0425SYann Gautier #define FREQ_10_20_MHZ			0x0
6088ef0425SYann Gautier #define FREQ_20_30_MHZ			0x1
6188ef0425SYann Gautier #define FREQ_30_45_MHZ			0x2
6288ef0425SYann Gautier #define FREQ_45_67_MHZ			0x3
6388ef0425SYann Gautier 
6488ef0425SYann Gautier /*
6588ef0425SYann Gautier  * Device info structure, providing device-specific functions and a means of
66*072d7532SNicolas Le Bayon  * adding driver-specific state.
6788ef0425SYann Gautier  */
6888ef0425SYann Gautier struct bsec_config {
69*072d7532SNicolas Le Bayon 	uint8_t den_lock;	/*
70*072d7532SNicolas Le Bayon 				 * Debug enable sticky lock
71*072d7532SNicolas Le Bayon 				 * 1 debug enable is locked until next reset
72*072d7532SNicolas Le Bayon 				 */
73*072d7532SNicolas Le Bayon 
74*072d7532SNicolas Le Bayon 	/*  BSEC2 only */
7588ef0425SYann Gautier 	uint8_t tread;		/* SAFMEM Reading current level default 0 */
7688ef0425SYann Gautier 	uint8_t pulse_width;	/* SAFMEM Programming pulse width default 1 */
77*072d7532SNicolas Le Bayon 	uint8_t freq;		/*
78*072d7532SNicolas Le Bayon 				 * SAFMEM CLOCK see freq value define
7988ef0425SYann Gautier 				 * default FREQ_45_67_MHZ
8088ef0425SYann Gautier 				 */
8188ef0425SYann Gautier 	uint8_t power;		/* Power up SAFMEM. 1 power up, 0 power off */
82*072d7532SNicolas Le Bayon 	uint8_t prog_lock;	/*
83*072d7532SNicolas Le Bayon 				 * Programming Sticky lock
8488ef0425SYann Gautier 				 * 1 programming is locked until next reset
8588ef0425SYann Gautier 				 */
86*072d7532SNicolas Le Bayon 	uint8_t upper_otp_lock;	/*
87*072d7532SNicolas Le Bayon 				 * Shadowing of upper OTP sticky lock
8888ef0425SYann Gautier 				 * 1 shadowing of upper OTP is locked
8988ef0425SYann Gautier 				 * until next reset
9088ef0425SYann Gautier 				 */
9188ef0425SYann Gautier };
9288ef0425SYann Gautier 
9388ef0425SYann Gautier uint32_t bsec_probe(void);
9488ef0425SYann Gautier uint32_t bsec_get_base(void);
9588ef0425SYann Gautier 
9688ef0425SYann Gautier uint32_t bsec_set_config(struct bsec_config *cfg);
9788ef0425SYann Gautier uint32_t bsec_get_config(struct bsec_config *cfg);
9888ef0425SYann Gautier 
9988ef0425SYann Gautier uint32_t bsec_shadow_register(uint32_t otp);
10088ef0425SYann Gautier uint32_t bsec_read_otp(uint32_t *val, uint32_t otp);
10188ef0425SYann Gautier uint32_t bsec_write_otp(uint32_t val, uint32_t otp);
10288ef0425SYann Gautier uint32_t bsec_program_otp(uint32_t val, uint32_t otp);
10388ef0425SYann Gautier uint32_t bsec_permanent_lock_otp(uint32_t otp);
10488ef0425SYann Gautier 
105*072d7532SNicolas Le Bayon void bsec_write_debug_conf(uint32_t val);
10688ef0425SYann Gautier uint32_t bsec_read_debug_conf(void);
107*072d7532SNicolas Le Bayon 
108*072d7532SNicolas Le Bayon void bsec_write_scratch(uint32_t val);
109*072d7532SNicolas Le Bayon uint32_t bsec_read_scratch(void);
11088ef0425SYann Gautier 
11188ef0425SYann Gautier uint32_t bsec_get_status(void);
11288ef0425SYann Gautier uint32_t bsec_get_hw_conf(void);
11388ef0425SYann Gautier uint32_t bsec_get_version(void);
11488ef0425SYann Gautier uint32_t bsec_get_id(void);
11588ef0425SYann Gautier uint32_t bsec_get_magic_id(void);
11688ef0425SYann Gautier 
117*072d7532SNicolas Le Bayon uint32_t bsec_set_sr_lock(uint32_t otp);
118*072d7532SNicolas Le Bayon uint32_t bsec_read_sr_lock(uint32_t otp, bool *value);
119*072d7532SNicolas Le Bayon uint32_t bsec_set_sw_lock(uint32_t otp);
120*072d7532SNicolas Le Bayon uint32_t bsec_read_sw_lock(uint32_t otp, bool *value);
121*072d7532SNicolas Le Bayon uint32_t bsec_set_sp_lock(uint32_t otp);
122*072d7532SNicolas Le Bayon uint32_t bsec_read_sp_lock(uint32_t otp, bool *value);
123*072d7532SNicolas Le Bayon uint32_t bsec_read_permanent_lock(uint32_t otp, bool *value);
124*072d7532SNicolas Le Bayon uint32_t bsec_otp_lock(uint32_t service);
12588ef0425SYann Gautier 
12688ef0425SYann Gautier uint32_t bsec_shadow_read_otp(uint32_t *otp_value, uint32_t word);
12788ef0425SYann Gautier uint32_t bsec_check_nsec_access_rights(uint32_t otp);
12888ef0425SYann Gautier 
12988ef0425SYann Gautier #endif /* BSEC_H */
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