1b525a8f0SKuldeep Singh // SPDX-License-Identifier: BSD-3-Clause 2b525a8f0SKuldeep Singh /* 3*a4f5015aSJiafei Pan * Copyright 2020-2021 NXP 4b525a8f0SKuldeep Singh */ 5b525a8f0SKuldeep Singh 6b525a8f0SKuldeep Singh /** 7b525a8f0SKuldeep Singh * @Flash info 8b525a8f0SKuldeep Singh * 9b525a8f0SKuldeep Singh */ 10b525a8f0SKuldeep Singh #ifndef FLASH_INFO_H 11b525a8f0SKuldeep Singh #define FLASH_INFO_H 12b525a8f0SKuldeep Singh 13b525a8f0SKuldeep Singh #define SZ_16M_BYTES 0x1000000U 14b525a8f0SKuldeep Singh 15b525a8f0SKuldeep Singh #if defined(CONFIG_MT25QU512A) 16b525a8f0SKuldeep Singh #define F_SECTOR_64K 0x10000U 17b525a8f0SKuldeep Singh #define F_PAGE_256 0x100U 18b525a8f0SKuldeep Singh #define F_SECTOR_4K 0x1000U 19b525a8f0SKuldeep Singh #define F_FLASH_SIZE_BYTES 0x4000000U 20b525a8f0SKuldeep Singh #define F_SECTOR_ERASE_SZ F_SECTOR_64K 21b525a8f0SKuldeep Singh #ifdef CONFIG_FSPI_4K_ERASE 22b525a8f0SKuldeep Singh #define F_SECTOR_ERASE_SZ F_SECTOR_4K 23b525a8f0SKuldeep Singh #endif 24b525a8f0SKuldeep Singh 25b525a8f0SKuldeep Singh #elif defined(CONFIG_MX25U25645G) 26b525a8f0SKuldeep Singh #define F_SECTOR_64K 0x10000U 27b525a8f0SKuldeep Singh #define F_PAGE_256 0x100U 28b525a8f0SKuldeep Singh #define F_SECTOR_4K 0x1000U 29b525a8f0SKuldeep Singh #define F_FLASH_SIZE_BYTES 0x2000000U 30b525a8f0SKuldeep Singh #define F_SECTOR_ERASE_SZ F_SECTOR_64K 31b525a8f0SKuldeep Singh #ifdef CONFIG_FSPI_4K_ERASE 32b525a8f0SKuldeep Singh #define F_SECTOR_ERASE_SZ F_SECTOR_4K 33b525a8f0SKuldeep Singh #endif 34b525a8f0SKuldeep Singh 35b525a8f0SKuldeep Singh #elif defined(CONFIG_MX25U51245G) 36b525a8f0SKuldeep Singh #define F_SECTOR_64K 0x10000U 37b525a8f0SKuldeep Singh #define F_PAGE_256 0x100U 38b525a8f0SKuldeep Singh #define F_SECTOR_4K 0x1000U 39b525a8f0SKuldeep Singh #define F_FLASH_SIZE_BYTES 0x4000000U 40b525a8f0SKuldeep Singh #define F_SECTOR_ERASE_SZ F_SECTOR_64K 41b525a8f0SKuldeep Singh #ifdef CONFIG_FSPI_4K_ERASE 42b525a8f0SKuldeep Singh #define F_SECTOR_ERASE_SZ F_SECTOR_4K 43b525a8f0SKuldeep Singh #endif 44b525a8f0SKuldeep Singh 45b525a8f0SKuldeep Singh #elif defined(CONFIG_MT35XU512A) 46b525a8f0SKuldeep Singh #define F_SECTOR_128K 0x20000U 47b525a8f0SKuldeep Singh #define F_SECTOR_32K 0x8000U 48b525a8f0SKuldeep Singh #define F_PAGE_256 0x100U 49b525a8f0SKuldeep Singh #define F_SECTOR_4K 0x1000U 50b525a8f0SKuldeep Singh #define F_FLASH_SIZE_BYTES 0x4000000U 51b525a8f0SKuldeep Singh #define F_SECTOR_ERASE_SZ F_SECTOR_128K 52b525a8f0SKuldeep Singh #ifdef CONFIG_FSPI_4K_ERASE 53b525a8f0SKuldeep Singh #define F_SECTOR_ERASE_SZ F_SECTOR_4K 54b525a8f0SKuldeep Singh #endif 55b525a8f0SKuldeep Singh 56*a4f5015aSJiafei Pan #elif defined(CONFIG_MT35XU02G) 57*a4f5015aSJiafei Pan #define F_SECTOR_128K 0x20000U 58*a4f5015aSJiafei Pan #define F_PAGE_256 0x100U 59*a4f5015aSJiafei Pan #define F_SECTOR_4K 0x1000U 60*a4f5015aSJiafei Pan #define F_FLASH_SIZE_BYTES 0x10000000U 61*a4f5015aSJiafei Pan #define F_SECTOR_ERASE_SZ F_SECTOR_128K 62*a4f5015aSJiafei Pan #ifdef CONFIG_FSPI_4K_ERASE 63*a4f5015aSJiafei Pan #define F_SECTOR_ERASE_SZ F_SECTOR_4K 64*a4f5015aSJiafei Pan #endif 65*a4f5015aSJiafei Pan 66b525a8f0SKuldeep Singh #ifdef NXP_WARM_BOOT 67b525a8f0SKuldeep Singh #define FLASH_WR_COMP_WAIT_BY_NOP_COUNT 0x20000 68b525a8f0SKuldeep Singh #endif 69b525a8f0SKuldeep Singh 70b525a8f0SKuldeep Singh #endif 71b525a8f0SKuldeep Singh #endif /* FLASH_INFO_H */ 72