1*050a99a6SPankaj Gupta /* 2*050a99a6SPankaj Gupta * Copyright 2021 NXP 3*050a99a6SPankaj Gupta * 4*050a99a6SPankaj Gupta * SPDX-License-Identifier: BSD-3-Clause 5*050a99a6SPankaj Gupta * 6*050a99a6SPankaj Gupta */ 7*050a99a6SPankaj Gupta 8*050a99a6SPankaj Gupta #ifndef DDR_IO_H 9*050a99a6SPankaj Gupta #define DDR_IO_H 10*050a99a6SPankaj Gupta 11*050a99a6SPankaj Gupta #include <endian.h> 12*050a99a6SPankaj Gupta 13*050a99a6SPankaj Gupta #include <lib/mmio.h> 14*050a99a6SPankaj Gupta 15*050a99a6SPankaj Gupta #define min(a, b) (((a) > (b)) ? (b) : (a)) 16*050a99a6SPankaj Gupta 17*050a99a6SPankaj Gupta #define max(a, b) (((a) > (b)) ? (a) : (b)) 18*050a99a6SPankaj Gupta 19*050a99a6SPankaj Gupta /* macro for memory barrier */ 20*050a99a6SPankaj Gupta #define mb() asm volatile("dsb sy" : : : "memory") 21*050a99a6SPankaj Gupta 22*050a99a6SPankaj Gupta #ifdef NXP_DDR_BE 23*050a99a6SPankaj Gupta #define ddr_in32(a) bswap32(mmio_read_32((uintptr_t)(a))) 24*050a99a6SPankaj Gupta #define ddr_out32(a, v) mmio_write_32((uintptr_t)(a),\ 25*050a99a6SPankaj Gupta bswap32(v)) 26*050a99a6SPankaj Gupta #elif defined(NXP_DDR_LE) 27*050a99a6SPankaj Gupta #define ddr_in32(a) mmio_read_32((uintptr_t)(a)) 28*050a99a6SPankaj Gupta #define ddr_out32(a, v) mmio_write_32((uintptr_t)(a), v) 29*050a99a6SPankaj Gupta #else 30*050a99a6SPankaj Gupta #error Please define CCSR DDR register endianness 31*050a99a6SPankaj Gupta #endif 32*050a99a6SPankaj Gupta 33*050a99a6SPankaj Gupta #define ddr_setbits32(a, v) ddr_out32((a), ddr_in32(a) | (v)) 34*050a99a6SPankaj Gupta #define ddr_clrbits32(a, v) ddr_out32((a), ddr_in32(a) & ~(v)) 35*050a99a6SPankaj Gupta #define ddr_clrsetbits32(a, c, s) ddr_out32((a), (ddr_in32(a) & ~(c)) \ 36*050a99a6SPankaj Gupta | (s)) 37*050a99a6SPankaj Gupta 38*050a99a6SPankaj Gupta #endif /* DDR_IO_H */ 39