xref: /rk3399_ARM-atf/include/drivers/nxp/crypto/caam/caam_io.h (revision 050a99a62f1df4de589be077b5b5fffe3c93afc7)
1*050a99a6SPankaj Gupta /*
2*050a99a6SPankaj Gupta  * Copyright 2018-2021 NXP
3*050a99a6SPankaj Gupta  *
4*050a99a6SPankaj Gupta  * SPDX-License-Identifier: BSD-3-Clause
5*050a99a6SPankaj Gupta  *
6*050a99a6SPankaj Gupta  */
7*050a99a6SPankaj Gupta 
8*050a99a6SPankaj Gupta #ifndef CAAM_IO_H
9*050a99a6SPankaj Gupta #define CAAM_IO_H
10*050a99a6SPankaj Gupta 
11*050a99a6SPankaj Gupta #include <endian.h>
12*050a99a6SPankaj Gupta #include <lib/mmio.h>
13*050a99a6SPankaj Gupta 
14*050a99a6SPankaj Gupta typedef unsigned long long phys_addr_t;
15*050a99a6SPankaj Gupta typedef unsigned long long phys_size_t;
16*050a99a6SPankaj Gupta 
17*050a99a6SPankaj Gupta /* Return higher 32 bits of physical address */
18*050a99a6SPankaj Gupta #define PHYS_ADDR_HI(phys_addr) \
19*050a99a6SPankaj Gupta 	    (uint32_t)(((uint64_t)phys_addr) >> 32)
20*050a99a6SPankaj Gupta 
21*050a99a6SPankaj Gupta /* Return lower 32 bits of physical address */
22*050a99a6SPankaj Gupta #define PHYS_ADDR_LO(phys_addr) \
23*050a99a6SPankaj Gupta 	    (uint32_t)(((uint64_t)phys_addr) & 0xFFFFFFFF)
24*050a99a6SPankaj Gupta 
25*050a99a6SPankaj Gupta #ifdef NXP_SEC_BE
26*050a99a6SPankaj Gupta #define sec_in32(a)	bswap32(mmio_read_32((uintptr_t)(a)))
27*050a99a6SPankaj Gupta #define sec_out32(a, v)	mmio_write_32((uintptr_t)(a), bswap32(v))
28*050a99a6SPankaj Gupta #define sec_in64(addr)  (					\
29*050a99a6SPankaj Gupta 	((uint64_t)sec_in32((uintptr_t)(addr)) << 32) |	\
30*050a99a6SPankaj Gupta 	(sec_in32(((uintptr_t)(addr)) + 4)))
31*050a99a6SPankaj Gupta #define sec_out64(addr, val) ({					\
32*050a99a6SPankaj Gupta 	sec_out32(((uintptr_t)(addr)), (uint32_t)((val) >> 32));	\
33*050a99a6SPankaj Gupta 	sec_out32(((uintptr_t)(addr)) + 4, (uint32_t)(val)); })
34*050a99a6SPankaj Gupta #elif defined(NXP_SEC_LE)
35*050a99a6SPankaj Gupta #define sec_in32(a)	mmio_read_32((uintptr_t)(a))
36*050a99a6SPankaj Gupta #define sec_out32(a, v)	mmio_write_32((uintptr_t)(a), (v))
37*050a99a6SPankaj Gupta #define sec_in64(addr)	(					\
38*050a99a6SPankaj Gupta 	((uint64_t)sec_in32((uintptr_t)(addr) + 4) << 32) |	\
39*050a99a6SPankaj Gupta 	(sec_in32((uintptr_t)(addr))))
40*050a99a6SPankaj Gupta #define sec_out64(addr, val) ({						\
41*050a99a6SPankaj Gupta 	sec_out32(((uintptr_t)(addr)) + 4, (uint32_t)((val) >> 32));	\
42*050a99a6SPankaj Gupta 	sec_out32(((uintptr_t)(addr)), (uint32_t)(val)); })
43*050a99a6SPankaj Gupta #else
44*050a99a6SPankaj Gupta #error Please define CCSR SEC register endianness
45*050a99a6SPankaj Gupta #endif
46*050a99a6SPankaj Gupta 
47*050a99a6SPankaj Gupta static inline void *ptov(phys_addr_t *ptr)
48*050a99a6SPankaj Gupta {
49*050a99a6SPankaj Gupta 	return (void *)ptr;
50*050a99a6SPankaj Gupta }
51*050a99a6SPankaj Gupta 
52*050a99a6SPankaj Gupta static inline phys_addr_t *vtop(void *ptr)
53*050a99a6SPankaj Gupta {
54*050a99a6SPankaj Gupta 	return (phys_addr_t *)ptr;
55*050a99a6SPankaj Gupta }
56*050a99a6SPankaj Gupta #endif /* CAAM_IO_H */
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