1*7e4d5620SIcenowy Zheng /* 2*7e4d5620SIcenowy Zheng * Copyright (C) 2018 Marvell International Ltd. 3*7e4d5620SIcenowy Zheng * Copyright (C) 2018 Icenowy Zheng <icenowy@aosc.io> 4*7e4d5620SIcenowy Zheng * 5*7e4d5620SIcenowy Zheng * SPDX-License-Identifier: BSD-3-Clause 6*7e4d5620SIcenowy Zheng * https://spdx.org/licenses 7*7e4d5620SIcenowy Zheng */ 8*7e4d5620SIcenowy Zheng 9*7e4d5620SIcenowy Zheng /* This driver provides support for Mentor Graphics MI2CV IP core */ 10*7e4d5620SIcenowy Zheng 11*7e4d5620SIcenowy Zheng #ifndef _MI2CV_H_ 12*7e4d5620SIcenowy Zheng #define _MI2CV_H_ 13*7e4d5620SIcenowy Zheng 14*7e4d5620SIcenowy Zheng #include <stdint.h> 15*7e4d5620SIcenowy Zheng 16*7e4d5620SIcenowy Zheng /* 17*7e4d5620SIcenowy Zheng * Initialization, must be called once on start up, may be called 18*7e4d5620SIcenowy Zheng * repeatedly to change the speed and slave addresses. 19*7e4d5620SIcenowy Zheng */ 20*7e4d5620SIcenowy Zheng void i2c_init(void *i2c_base); 21*7e4d5620SIcenowy Zheng 22*7e4d5620SIcenowy Zheng /* 23*7e4d5620SIcenowy Zheng * Read/Write interface: 24*7e4d5620SIcenowy Zheng * chip: I2C chip address, range 0..127 25*7e4d5620SIcenowy Zheng * addr: Memory (register) address within the chip 26*7e4d5620SIcenowy Zheng * alen: Number of bytes to use for addr (typically 1, 2 for larger 27*7e4d5620SIcenowy Zheng * memories, 0 for register type devices with only one 28*7e4d5620SIcenowy Zheng * register) 29*7e4d5620SIcenowy Zheng * buffer: Where to read/write the data 30*7e4d5620SIcenowy Zheng * len: How many bytes to read/write 31*7e4d5620SIcenowy Zheng * 32*7e4d5620SIcenowy Zheng * Returns: 0 on success, not 0 on failure 33*7e4d5620SIcenowy Zheng */ 34*7e4d5620SIcenowy Zheng int i2c_read(uint8_t chip, 35*7e4d5620SIcenowy Zheng unsigned int addr, int alen, uint8_t *buffer, int len); 36*7e4d5620SIcenowy Zheng 37*7e4d5620SIcenowy Zheng int i2c_write(uint8_t chip, 38*7e4d5620SIcenowy Zheng unsigned int addr, int alen, uint8_t *buffer, int len); 39*7e4d5620SIcenowy Zheng #endif 40