xref: /rk3399_ARM-atf/include/drivers/marvell/cache_llc.h (revision 63a0b12794ca38d0bdf8982ae4009b78350c43e5)
1 /*
2  * Copyright (C) 2018 Marvell International Ltd.
3  *
4  * SPDX-License-Identifier:     BSD-3-Clause
5  * https://spdx.org/licenses
6  */
7 
8 /* LLC driver is the Last Level Cache (L3C) driver
9  * for Marvell SoCs in AP806, AP807, and AP810
10  */
11 
12 #ifndef CACHE_LLC_H
13 #define CACHE_LLC_H
14 
15 #define LLC_CTRL(ap)			(MVEBU_LLC_BASE(ap) + 0x100)
16 #define LLC_SYNC(ap)			(MVEBU_LLC_BASE(ap) + 0x700)
17 #define LLC_BANKED_MNT_AHR(ap)		(MVEBU_LLC_BASE(ap) + 0x724)
18 #define LLC_INV_WAY(ap)			(MVEBU_LLC_BASE(ap) + 0x77C)
19 #define LLC_BLK_ALOC(ap)		(MVEBU_LLC_BASE(ap) + 0x78c)
20 #define LLC_CLEAN_WAY(ap)		(MVEBU_LLC_BASE(ap) + 0x7BC)
21 #define LLC_CLEAN_INV_WAY(ap)		(MVEBU_LLC_BASE(ap) + 0x7FC)
22 #define LLC_TC0_LOCK(ap)		(MVEBU_LLC_BASE(ap) + 0x920)
23 
24 #define MASTER_LLC_CTRL			LLC_CTRL(MVEBU_AP0)
25 #define MASTER_LLC_INV_WAY		LLC_INV_WAY(MVEBU_AP0)
26 #define MASTER_LLC_TC0_LOCK		LLC_TC0_LOCK(MVEBU_AP0)
27 
28 #define LLC_CTRL_EN			1
29 #define LLC_EXCLUSIVE_EN		0x100
30 #define LLC_ALL_WAYS_MASK		0xFFFFFFFF
31 
32 /* AP806/AP807 - 1MB 8-ways LLC */
33 #define LLC_WAYS			8
34 #define LLC_WAY_MASK			((1 << LLC_WAYS) - 1)
35 #define LLC_SIZE			(1024 * 1024)
36 #define LLC_WAY_SIZE			(LLC_SIZE / LLC_WAYS)
37 
38 
39 #ifndef __ASSEMBLER__
40 void llc_cache_sync(int ap_index);
41 void llc_flush_all(int ap_index);
42 void llc_clean_all(int ap_index);
43 void llc_inv_all(int ap_index);
44 void llc_disable(int ap_index);
45 void llc_enable(int ap_index, int excl_mode);
46 int llc_is_exclusive(int ap_index);
47 void llc_runtime_enable(int ap_index);
48 #endif
49 
50 #endif /* CACHE_LLC_H */
51