1 /* 2 * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef __TZC400_H__ 32 #define __TZC400_H__ 33 34 #include <stdint.h> 35 36 #define BUILD_CONFIG_OFF 0x000 37 #define ACTION_OFF 0x004 38 #define GATE_KEEPER_OFF 0x008 39 #define SPECULATION_CTRL_OFF 0x00c 40 #define INT_STATUS 0x010 41 #define INT_CLEAR 0x014 42 43 #define FAIL_ADDRESS_LOW_OFF 0x020 44 #define FAIL_ADDRESS_HIGH_OFF 0x024 45 #define FAIL_CONTROL_OFF 0x028 46 #define FAIL_ID 0x02c 47 48 #define REGION_BASE_LOW_OFF 0x100 49 #define REGION_BASE_HIGH_OFF 0x104 50 #define REGION_TOP_LOW_OFF 0x108 51 #define REGION_TOP_HIGH_OFF 0x10c 52 #define REGION_ATTRIBUTES_OFF 0x110 53 #define REGION_ID_ACCESS_OFF 0x114 54 #define REGION_NUM_OFF(region) (0x20 * region) 55 56 /* ID Registers */ 57 #define PID0_OFF 0xfe0 58 #define PID1_OFF 0xfe4 59 #define PID2_OFF 0xfe8 60 #define PID3_OFF 0xfec 61 #define PID4_OFF 0xfd0 62 #define PID5_OFF 0xfd4 63 #define PID6_OFF 0xfd8 64 #define PID7_OFF 0xfdc 65 #define CID0_OFF 0xff0 66 #define CID1_OFF 0xff4 67 #define CID2_OFF 0xff8 68 #define CID3_OFF 0xffc 69 70 #define BUILD_CONFIG_NF_SHIFT 24 71 #define BUILD_CONFIG_NF_MASK 0x3 72 #define BUILD_CONFIG_AW_SHIFT 8 73 #define BUILD_CONFIG_AW_MASK 0x3f 74 #define BUILD_CONFIG_NR_SHIFT 0 75 #define BUILD_CONFIG_NR_MASK 0x1f 76 77 /* Not describing the case where regions 1 to 8 overlap */ 78 #define ACTION_RV_SHIFT 0 79 #define ACTION_RV_MASK 0x3 80 #define ACTION_RV_LOWOK 0x0 81 #define ACTION_RV_LOWERR 0x1 82 #define ACTION_RV_HIGHOK 0x2 83 #define ACTION_RV_HIGHERR 0x3 84 85 /* 86 * Number of gate keepers is implementation defined. But we know the max for 87 * this device is 4. Get implementation details from BUILD_CONFIG. 88 */ 89 #define GATE_KEEPER_OS_SHIFT 16 90 #define GATE_KEEPER_OS_MASK 0xf 91 #define GATE_KEEPER_OR_SHIFT 0 92 #define GATE_KEEPER_OR_MASK 0xf 93 94 /* Speculation is enabled by default. */ 95 #define SPECULATION_CTRL_WRITE_DISABLE (1 << 1) 96 #define SPECULATION_CTRL_READ_DISABLE (1 << 0) 97 98 /* Max number of filters allowed is 4. */ 99 #define INT_STATUS_OVERLAP_SHIFT 16 100 #define INT_STATUS_OVERLAP_MASK 0xf 101 #define INT_STATUS_OVERRUN_SHIFT 8 102 #define INT_STATUS_OVERRUN_MASK 0xf 103 #define INT_STATUS_STATUS_SHIFT 0 104 #define INT_STATUS_STATUS_MASK 0xf 105 106 #define INT_CLEAR_CLEAR_SHIFT 0 107 #define INT_CLEAR_CLEAR_MASK 0xf 108 109 #define FAIL_CONTROL_DIR_SHIFT (1 << 24) 110 #define FAIL_CONTROL_DIR_READ 0x0 111 #define FAIL_CONTROL_DIR_WRITE 0x1 112 #define FAIL_CONTROL_NS_SHIFT (1 << 21) 113 #define FAIL_CONTROL_NS_SECURE 0x0 114 #define FAIL_CONTROL_NS_NONSECURE 0x1 115 #define FAIL_CONTROL_PRIV_SHIFT (1 << 20) 116 #define FAIL_CONTROL_PRIV_PRIV 0x0 117 #define FAIL_CONTROL_PRIV_UNPRIV 0x1 118 119 /* 120 * FAIL_ID_ID_MASK depends on AID_WIDTH which is platform specific. 121 * Platform should provide the value on initialisation. 122 */ 123 #define FAIL_ID_VNET_SHIFT 24 124 #define FAIL_ID_VNET_MASK 0xf 125 #define FAIL_ID_ID_SHIFT 0 126 127 /* Used along with 'tzc_region_attributes_t' below */ 128 #define REGION_ATTRIBUTES_SEC_SHIFT 30 129 #define REGION_ATTRIBUTES_F_EN_SHIFT 0 130 #define REGION_ATTRIBUTES_F_EN_MASK 0xf 131 132 #define REGION_ID_ACCESS_NSAID_WR_EN_SHIFT 16 133 #define REGION_ID_ACCESS_NSAID_RD_EN_SHIFT 0 134 #define REGION_ID_ACCESS_NSAID_ID_MASK 0xf 135 136 137 /* Macros for setting Region ID access permissions based on NSAID */ 138 #define TZC_REGION_ACCESS_RD(id) \ 139 ((1 << (id & REGION_ID_ACCESS_NSAID_ID_MASK)) << \ 140 REGION_ID_ACCESS_NSAID_RD_EN_SHIFT) 141 #define TZC_REGION_ACCESS_WR(id) \ 142 ((1 << (id & REGION_ID_ACCESS_NSAID_ID_MASK)) << \ 143 REGION_ID_ACCESS_NSAID_WR_EN_SHIFT) 144 #define TZC_REGION_ACCESS_RDWR(id) \ 145 (TZC_REGION_ACCESS_RD(id) | TZC_REGION_ACCESS_WR(id)) 146 147 /* Filters are bit mapped 0 to 3. */ 148 #define TZC400_COMPONENT_ID 0xb105f00d 149 150 #ifndef __ASSEMBLY__ 151 152 /******************************************************************************* 153 * Function & variable prototypes 154 ******************************************************************************/ 155 156 /* 157 * What type of action is expected when an access violation occurs. 158 * The memory requested is zeroed. But we can also raise and event to 159 * let the system know it happened. 160 * We can raise an interrupt(INT) and/or cause an exception(ERR). 161 * TZC_ACTION_NONE - No interrupt, no Exception 162 * TZC_ACTION_ERR - No interrupt, raise exception -> sync external 163 * data abort 164 * TZC_ACTION_INT - Raise interrupt, no exception 165 * TZC_ACTION_ERR_INT - Raise interrupt, raise exception -> sync 166 * external data abort 167 */ 168 typedef enum { 169 TZC_ACTION_NONE = 0, 170 TZC_ACTION_ERR = 1, 171 TZC_ACTION_INT = 2, 172 TZC_ACTION_ERR_INT = (TZC_ACTION_ERR | TZC_ACTION_INT) 173 } tzc_action_t; 174 175 /* 176 * Controls secure access to a region. If not enabled secure access is not 177 * allowed to region. 178 */ 179 typedef enum { 180 TZC_REGION_S_NONE = 0, 181 TZC_REGION_S_RD = 1, 182 TZC_REGION_S_WR = 2, 183 TZC_REGION_S_RDWR = (TZC_REGION_S_RD | TZC_REGION_S_WR) 184 } tzc_region_attributes_t; 185 186 /* 187 * Implementation defined values used to validate inputs later. 188 * Filters : max of 4 ; 0 to 3 189 * Regions : max of 9 ; 0 to 8 190 * Address width : Values between 32 to 64 191 */ 192 typedef struct tzc_instance { 193 uint64_t base; 194 uint32_t aid_width; 195 uint8_t addr_width; 196 uint8_t num_filters; 197 uint8_t num_regions; 198 } tzc_instance_t ; 199 200 void tzc_init(tzc_instance_t *controller); 201 void tzc_configure_region(const tzc_instance_t *controller, uint32_t filters, 202 uint8_t region, uint64_t region_base, uint64_t region_top, 203 tzc_region_attributes_t sec_attr, uint32_t ns_device_access); 204 void tzc_enable_filters(const tzc_instance_t *controller); 205 void tzc_disable_filters(const tzc_instance_t *controller); 206 void tzc_set_action(const tzc_instance_t *controller, tzc_action_t action); 207 208 #endif /*__ASSEMBLY__*/ 209 210 #endif /* __TZC400__ */ 211