xref: /rk3399_ARM-atf/include/drivers/arm/tzc400.h (revision dc6aad2e133829ee4c7bb9d2ba87c43f668f2acb)
14ecca339SDan Handley /*
2*dc6aad2eSRoberto Vargas  * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
34ecca339SDan Handley  *
482cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
54ecca339SDan Handley  */
64ecca339SDan Handley 
74ecca339SDan Handley #ifndef __TZC400_H__
84ecca339SDan Handley #define __TZC400_H__
94ecca339SDan Handley 
106b477063SVikram Kanigiri #include <tzc_common.h>
114ecca339SDan Handley 
124ecca339SDan Handley #define BUILD_CONFIG_OFF			0x000
134ecca339SDan Handley #define GATE_KEEPER_OFF				0x008
144ecca339SDan Handley #define SPECULATION_CTRL_OFF			0x00c
154ecca339SDan Handley #define INT_STATUS				0x010
164ecca339SDan Handley #define INT_CLEAR				0x014
174ecca339SDan Handley 
184ecca339SDan Handley #define FAIL_ADDRESS_LOW_OFF			0x020
194ecca339SDan Handley #define FAIL_ADDRESS_HIGH_OFF			0x024
204ecca339SDan Handley #define FAIL_CONTROL_OFF			0x028
214ecca339SDan Handley #define FAIL_ID					0x02c
224ecca339SDan Handley 
236b477063SVikram Kanigiri /* ID registers not common across different varieties of TZC */
246b477063SVikram Kanigiri #define PID5					0xFD4
256b477063SVikram Kanigiri #define PID6					0xFD8
266b477063SVikram Kanigiri #define PID7					0xFDC
274ecca339SDan Handley 
284ecca339SDan Handley #define BUILD_CONFIG_NF_SHIFT			24
294ecca339SDan Handley #define BUILD_CONFIG_NF_MASK			0x3
304ecca339SDan Handley #define BUILD_CONFIG_AW_SHIFT			8
314ecca339SDan Handley #define BUILD_CONFIG_AW_MASK			0x3f
324ecca339SDan Handley #define BUILD_CONFIG_NR_SHIFT			0
334ecca339SDan Handley #define BUILD_CONFIG_NR_MASK			0x1f
344ecca339SDan Handley 
354ecca339SDan Handley /*
364ecca339SDan Handley  * Number of gate keepers is implementation defined. But we know the max for
374ecca339SDan Handley  * this device is 4. Get implementation details from BUILD_CONFIG.
384ecca339SDan Handley  */
394ecca339SDan Handley #define GATE_KEEPER_OS_SHIFT			16
404ecca339SDan Handley #define GATE_KEEPER_OS_MASK			0xf
414ecca339SDan Handley #define GATE_KEEPER_OR_SHIFT			0
424ecca339SDan Handley #define GATE_KEEPER_OR_MASK			0xf
43d3280bebSJuan Castillo #define GATE_KEEPER_FILTER_MASK			0x1
444ecca339SDan Handley 
454ecca339SDan Handley /* Speculation is enabled by default. */
464ecca339SDan Handley #define SPECULATION_CTRL_WRITE_DISABLE		(1 << 1)
474ecca339SDan Handley #define SPECULATION_CTRL_READ_DISABLE		(1 << 0)
484ecca339SDan Handley 
494ecca339SDan Handley /* Max number of filters allowed is 4. */
504ecca339SDan Handley #define INT_STATUS_OVERLAP_SHIFT		16
514ecca339SDan Handley #define INT_STATUS_OVERLAP_MASK			0xf
524ecca339SDan Handley #define INT_STATUS_OVERRUN_SHIFT		8
534ecca339SDan Handley #define INT_STATUS_OVERRUN_MASK			0xf
544ecca339SDan Handley #define INT_STATUS_STATUS_SHIFT			0
554ecca339SDan Handley #define INT_STATUS_STATUS_MASK			0xf
564ecca339SDan Handley 
574ecca339SDan Handley #define INT_CLEAR_CLEAR_SHIFT			0
584ecca339SDan Handley #define INT_CLEAR_CLEAR_MASK			0xf
594ecca339SDan Handley 
604ecca339SDan Handley #define FAIL_CONTROL_DIR_SHIFT			(1 << 24)
614ecca339SDan Handley #define FAIL_CONTROL_DIR_READ			0x0
624ecca339SDan Handley #define FAIL_CONTROL_DIR_WRITE			0x1
634ecca339SDan Handley #define FAIL_CONTROL_NS_SHIFT			(1 << 21)
644ecca339SDan Handley #define FAIL_CONTROL_NS_SECURE			0x0
654ecca339SDan Handley #define FAIL_CONTROL_NS_NONSECURE		0x1
664ecca339SDan Handley #define FAIL_CONTROL_PRIV_SHIFT			(1 << 20)
674ecca339SDan Handley #define FAIL_CONTROL_PRIV_PRIV			0x0
684ecca339SDan Handley #define FAIL_CONTROL_PRIV_UNPRIV		0x1
694ecca339SDan Handley 
704ecca339SDan Handley /*
714ecca339SDan Handley  * FAIL_ID_ID_MASK depends on AID_WIDTH which is platform specific.
724ecca339SDan Handley  * Platform should provide the value on initialisation.
734ecca339SDan Handley  */
744ecca339SDan Handley #define FAIL_ID_VNET_SHIFT			24
754ecca339SDan Handley #define FAIL_ID_VNET_MASK			0xf
764ecca339SDan Handley #define FAIL_ID_ID_SHIFT			0
774ecca339SDan Handley 
786b477063SVikram Kanigiri #define TZC_400_PERIPHERAL_ID			0x460
794ecca339SDan Handley 
806b477063SVikram Kanigiri /* Filter enable bits in a TZC */
816b477063SVikram Kanigiri #define TZC_400_REGION_ATTR_F_EN_MASK		0xf
826b477063SVikram Kanigiri #define TZC_400_REGION_ATTR_FILTER_BIT(x)	((1 << x)		\
836b477063SVikram Kanigiri 					<< TZC_REGION_ATTR_F_EN_SHIFT)
846b477063SVikram Kanigiri #define TZC_400_REGION_ATTR_FILTER_BIT_ALL				\
856b477063SVikram Kanigiri 				(TZC_400_REGION_ATTR_F_EN_MASK <<	\
866b477063SVikram Kanigiri 				TZC_REGION_ATTR_F_EN_SHIFT)
874ecca339SDan Handley 
886b477063SVikram Kanigiri /*
896b477063SVikram Kanigiri  * Define some macros for backward compatibility with existing tzc400 clients.
906b477063SVikram Kanigiri  */
916b477063SVikram Kanigiri #if !ERROR_DEPRECATED
926b477063SVikram Kanigiri #define REG_ATTR_FILTER_BIT(x)			((1 << x)		\
936b477063SVikram Kanigiri 					<< TZC_REGION_ATTR_F_EN_SHIFT)
946b477063SVikram Kanigiri #define REG_ATTR_FILTER_BIT_ALL	(TZC_400_REGION_ATTR_F_EN_MASK <<	\
956b477063SVikram Kanigiri 					TZC_REGION_ATTR_F_EN_SHIFT)
966b477063SVikram Kanigiri #endif /* __ERROR_DEPRECATED__ */
974ecca339SDan Handley 
986b477063SVikram Kanigiri /*
996b477063SVikram Kanigiri  * All TZC region configuration registers are placed one after another. It
1006b477063SVikram Kanigiri  * depicts size of block of registers for programming each region.
1016b477063SVikram Kanigiri  */
1026b477063SVikram Kanigiri #define TZC_400_REGION_SIZE			0x20
1036b477063SVikram Kanigiri #define TZC_400_ACTION_OFF			0x4
10471a84445SDan Handley 
10571a84445SDan Handley #ifndef __ASSEMBLY__
10671a84445SDan Handley 
1076b477063SVikram Kanigiri #include <cdefs.h>
10871a84445SDan Handley #include <stdint.h>
10971a84445SDan Handley 
1104ecca339SDan Handley /*******************************************************************************
1114ecca339SDan Handley  * Function & variable prototypes
1124ecca339SDan Handley  ******************************************************************************/
1136b477063SVikram Kanigiri void tzc400_init(uintptr_t base);
1146b477063SVikram Kanigiri void tzc400_configure_region0(tzc_region_attributes_t sec_attr,
1156b477063SVikram Kanigiri 			   unsigned int ns_device_access);
1166b477063SVikram Kanigiri void tzc400_configure_region(unsigned int filters,
1176b477063SVikram Kanigiri 			  int region,
1189fbdb802SYatharth Kochar 			  unsigned long long region_base,
1199fbdb802SYatharth Kochar 			  unsigned long long region_top,
1203279f625SDan Handley 			  tzc_region_attributes_t sec_attr,
121*dc6aad2eSRoberto Vargas 			  unsigned int nsaid_permissions);
1226b477063SVikram Kanigiri void tzc400_set_action(tzc_action_t action);
1236b477063SVikram Kanigiri void tzc400_enable_filters(void);
1246b477063SVikram Kanigiri void tzc400_disable_filters(void);
1256b477063SVikram Kanigiri 
1266b477063SVikram Kanigiri /*
1276b477063SVikram Kanigiri  * Deprecated APIs
1286b477063SVikram Kanigiri  */
1296b477063SVikram Kanigiri static inline void tzc_init(uintptr_t base) __deprecated;
1306b477063SVikram Kanigiri static inline void tzc_configure_region0(
1316b477063SVikram Kanigiri 			tzc_region_attributes_t sec_attr,
1326b477063SVikram Kanigiri 			unsigned int ns_device_access) __deprecated;
1336b477063SVikram Kanigiri static inline void tzc_configure_region(
1346b477063SVikram Kanigiri 			  unsigned int filters,
1356b477063SVikram Kanigiri 			  int region,
1369fbdb802SYatharth Kochar 			  unsigned long long region_base,
1379fbdb802SYatharth Kochar 			  unsigned long long region_top,
1386b477063SVikram Kanigiri 			  tzc_region_attributes_t sec_attr,
1396b477063SVikram Kanigiri 			  unsigned int ns_device_access) __deprecated;
1406b477063SVikram Kanigiri static inline void tzc_set_action(tzc_action_t action) __deprecated;
1416b477063SVikram Kanigiri static inline void tzc_enable_filters(void) __deprecated;
1426b477063SVikram Kanigiri static inline void tzc_disable_filters(void) __deprecated;
1436b477063SVikram Kanigiri 
1446b477063SVikram Kanigiri static inline void tzc_init(uintptr_t base)
1456b477063SVikram Kanigiri {
1466b477063SVikram Kanigiri 	tzc400_init(base);
1476b477063SVikram Kanigiri }
1486b477063SVikram Kanigiri 
1496b477063SVikram Kanigiri static inline void tzc_configure_region0(
1506b477063SVikram Kanigiri 			tzc_region_attributes_t sec_attr,
1516b477063SVikram Kanigiri 			unsigned int ns_device_access)
1526b477063SVikram Kanigiri {
1536b477063SVikram Kanigiri 	tzc400_configure_region0(sec_attr, ns_device_access);
1546b477063SVikram Kanigiri }
1556b477063SVikram Kanigiri 
1566b477063SVikram Kanigiri static inline void tzc_configure_region(
1576b477063SVikram Kanigiri 			  unsigned int filters,
1586b477063SVikram Kanigiri 			  int region,
1599fbdb802SYatharth Kochar 			  unsigned long long region_base,
1609fbdb802SYatharth Kochar 			  unsigned long long region_top,
1616b477063SVikram Kanigiri 			  tzc_region_attributes_t sec_attr,
1626b477063SVikram Kanigiri 			  unsigned int ns_device_access)
1636b477063SVikram Kanigiri {
1646b477063SVikram Kanigiri 	tzc400_configure_region(filters, region, region_base,
1656b477063SVikram Kanigiri 			region_top, sec_attr, ns_device_access);
1666b477063SVikram Kanigiri }
1676b477063SVikram Kanigiri 
1686b477063SVikram Kanigiri static inline void tzc_set_action(tzc_action_t action)
1696b477063SVikram Kanigiri {
1706b477063SVikram Kanigiri 	tzc400_set_action(action);
1716b477063SVikram Kanigiri }
1726b477063SVikram Kanigiri 
1736b477063SVikram Kanigiri 
1746b477063SVikram Kanigiri static inline void tzc_enable_filters(void)
1756b477063SVikram Kanigiri {
1766b477063SVikram Kanigiri 	tzc400_enable_filters();
1776b477063SVikram Kanigiri }
1786b477063SVikram Kanigiri 
1796b477063SVikram Kanigiri static inline void tzc_disable_filters(void)
1806b477063SVikram Kanigiri {
1816b477063SVikram Kanigiri 	tzc400_disable_filters();
1826b477063SVikram Kanigiri }
1834ecca339SDan Handley 
18471a84445SDan Handley #endif /* __ASSEMBLY__ */
1854ecca339SDan Handley 
1864ecca339SDan Handley #endif /* __TZC400__ */
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