xref: /rk3399_ARM-atf/include/drivers/arm/tzc400.h (revision 6b4770637593f79aa6cfd1f062c1e5d0b1d587bc)
14ecca339SDan Handley /*
2*6b477063SVikram Kanigiri  * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
34ecca339SDan Handley  *
44ecca339SDan Handley  * Redistribution and use in source and binary forms, with or without
54ecca339SDan Handley  * modification, are permitted provided that the following conditions are met:
64ecca339SDan Handley  *
74ecca339SDan Handley  * Redistributions of source code must retain the above copyright notice, this
84ecca339SDan Handley  * list of conditions and the following disclaimer.
94ecca339SDan Handley  *
104ecca339SDan Handley  * Redistributions in binary form must reproduce the above copyright notice,
114ecca339SDan Handley  * this list of conditions and the following disclaimer in the documentation
124ecca339SDan Handley  * and/or other materials provided with the distribution.
134ecca339SDan Handley  *
144ecca339SDan Handley  * Neither the name of ARM nor the names of its contributors may be used
154ecca339SDan Handley  * to endorse or promote products derived from this software without specific
164ecca339SDan Handley  * prior written permission.
174ecca339SDan Handley  *
184ecca339SDan Handley  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
194ecca339SDan Handley  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
204ecca339SDan Handley  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
214ecca339SDan Handley  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
224ecca339SDan Handley  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
234ecca339SDan Handley  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
244ecca339SDan Handley  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
254ecca339SDan Handley  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
264ecca339SDan Handley  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
274ecca339SDan Handley  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
284ecca339SDan Handley  * POSSIBILITY OF SUCH DAMAGE.
294ecca339SDan Handley  */
304ecca339SDan Handley 
314ecca339SDan Handley #ifndef __TZC400_H__
324ecca339SDan Handley #define __TZC400_H__
334ecca339SDan Handley 
34*6b477063SVikram Kanigiri #include <tzc_common.h>
354ecca339SDan Handley 
364ecca339SDan Handley #define BUILD_CONFIG_OFF			0x000
374ecca339SDan Handley #define GATE_KEEPER_OFF				0x008
384ecca339SDan Handley #define SPECULATION_CTRL_OFF			0x00c
394ecca339SDan Handley #define INT_STATUS				0x010
404ecca339SDan Handley #define INT_CLEAR				0x014
414ecca339SDan Handley 
424ecca339SDan Handley #define FAIL_ADDRESS_LOW_OFF			0x020
434ecca339SDan Handley #define FAIL_ADDRESS_HIGH_OFF			0x024
444ecca339SDan Handley #define FAIL_CONTROL_OFF			0x028
454ecca339SDan Handley #define FAIL_ID					0x02c
464ecca339SDan Handley 
47*6b477063SVikram Kanigiri /* ID registers not common across different varieties of TZC */
48*6b477063SVikram Kanigiri #define PID5					0xFD4
49*6b477063SVikram Kanigiri #define PID6					0xFD8
50*6b477063SVikram Kanigiri #define PID7					0xFDC
514ecca339SDan Handley 
524ecca339SDan Handley #define BUILD_CONFIG_NF_SHIFT			24
534ecca339SDan Handley #define BUILD_CONFIG_NF_MASK			0x3
544ecca339SDan Handley #define BUILD_CONFIG_AW_SHIFT			8
554ecca339SDan Handley #define BUILD_CONFIG_AW_MASK			0x3f
564ecca339SDan Handley #define BUILD_CONFIG_NR_SHIFT			0
574ecca339SDan Handley #define BUILD_CONFIG_NR_MASK			0x1f
584ecca339SDan Handley 
594ecca339SDan Handley /*
604ecca339SDan Handley  * Number of gate keepers is implementation defined. But we know the max for
614ecca339SDan Handley  * this device is 4. Get implementation details from BUILD_CONFIG.
624ecca339SDan Handley  */
634ecca339SDan Handley #define GATE_KEEPER_OS_SHIFT			16
644ecca339SDan Handley #define GATE_KEEPER_OS_MASK			0xf
654ecca339SDan Handley #define GATE_KEEPER_OR_SHIFT			0
664ecca339SDan Handley #define GATE_KEEPER_OR_MASK			0xf
67d3280bebSJuan Castillo #define GATE_KEEPER_FILTER_MASK			0x1
684ecca339SDan Handley 
694ecca339SDan Handley /* Speculation is enabled by default. */
704ecca339SDan Handley #define SPECULATION_CTRL_WRITE_DISABLE		(1 << 1)
714ecca339SDan Handley #define SPECULATION_CTRL_READ_DISABLE		(1 << 0)
724ecca339SDan Handley 
734ecca339SDan Handley /* Max number of filters allowed is 4. */
744ecca339SDan Handley #define INT_STATUS_OVERLAP_SHIFT		16
754ecca339SDan Handley #define INT_STATUS_OVERLAP_MASK			0xf
764ecca339SDan Handley #define INT_STATUS_OVERRUN_SHIFT		8
774ecca339SDan Handley #define INT_STATUS_OVERRUN_MASK			0xf
784ecca339SDan Handley #define INT_STATUS_STATUS_SHIFT			0
794ecca339SDan Handley #define INT_STATUS_STATUS_MASK			0xf
804ecca339SDan Handley 
814ecca339SDan Handley #define INT_CLEAR_CLEAR_SHIFT			0
824ecca339SDan Handley #define INT_CLEAR_CLEAR_MASK			0xf
834ecca339SDan Handley 
844ecca339SDan Handley #define FAIL_CONTROL_DIR_SHIFT			(1 << 24)
854ecca339SDan Handley #define FAIL_CONTROL_DIR_READ			0x0
864ecca339SDan Handley #define FAIL_CONTROL_DIR_WRITE			0x1
874ecca339SDan Handley #define FAIL_CONTROL_NS_SHIFT			(1 << 21)
884ecca339SDan Handley #define FAIL_CONTROL_NS_SECURE			0x0
894ecca339SDan Handley #define FAIL_CONTROL_NS_NONSECURE		0x1
904ecca339SDan Handley #define FAIL_CONTROL_PRIV_SHIFT			(1 << 20)
914ecca339SDan Handley #define FAIL_CONTROL_PRIV_PRIV			0x0
924ecca339SDan Handley #define FAIL_CONTROL_PRIV_UNPRIV		0x1
934ecca339SDan Handley 
944ecca339SDan Handley /*
954ecca339SDan Handley  * FAIL_ID_ID_MASK depends on AID_WIDTH which is platform specific.
964ecca339SDan Handley  * Platform should provide the value on initialisation.
974ecca339SDan Handley  */
984ecca339SDan Handley #define FAIL_ID_VNET_SHIFT			24
994ecca339SDan Handley #define FAIL_ID_VNET_MASK			0xf
1004ecca339SDan Handley #define FAIL_ID_ID_SHIFT			0
1014ecca339SDan Handley 
102*6b477063SVikram Kanigiri #define TZC_400_PERIPHERAL_ID			0x460
1034ecca339SDan Handley 
104*6b477063SVikram Kanigiri /* Filter enable bits in a TZC */
105*6b477063SVikram Kanigiri #define TZC_400_REGION_ATTR_F_EN_MASK		0xf
106*6b477063SVikram Kanigiri #define TZC_400_REGION_ATTR_FILTER_BIT(x)	((1 << x)		\
107*6b477063SVikram Kanigiri 					<< TZC_REGION_ATTR_F_EN_SHIFT)
108*6b477063SVikram Kanigiri #define TZC_400_REGION_ATTR_FILTER_BIT_ALL				\
109*6b477063SVikram Kanigiri 				(TZC_400_REGION_ATTR_F_EN_MASK <<	\
110*6b477063SVikram Kanigiri 				TZC_REGION_ATTR_F_EN_SHIFT)
1114ecca339SDan Handley 
112*6b477063SVikram Kanigiri /*
113*6b477063SVikram Kanigiri  * Define some macros for backward compatibility with existing tzc400 clients.
114*6b477063SVikram Kanigiri  */
115*6b477063SVikram Kanigiri #if !ERROR_DEPRECATED
116*6b477063SVikram Kanigiri #define REG_ATTR_FILTER_BIT(x)			((1 << x)		\
117*6b477063SVikram Kanigiri 					<< TZC_REGION_ATTR_F_EN_SHIFT)
118*6b477063SVikram Kanigiri #define REG_ATTR_FILTER_BIT_ALL	(TZC_400_REGION_ATTR_F_EN_MASK <<	\
119*6b477063SVikram Kanigiri 					TZC_REGION_ATTR_F_EN_SHIFT)
120*6b477063SVikram Kanigiri #endif /* __ERROR_DEPRECATED__ */
1214ecca339SDan Handley 
122*6b477063SVikram Kanigiri /*
123*6b477063SVikram Kanigiri  * All TZC region configuration registers are placed one after another. It
124*6b477063SVikram Kanigiri  * depicts size of block of registers for programming each region.
125*6b477063SVikram Kanigiri  */
126*6b477063SVikram Kanigiri #define TZC_400_REGION_SIZE			0x20
127*6b477063SVikram Kanigiri #define TZC_400_ACTION_OFF			0x4
12871a84445SDan Handley 
12971a84445SDan Handley #ifndef __ASSEMBLY__
13071a84445SDan Handley 
131*6b477063SVikram Kanigiri #include <cdefs.h>
13271a84445SDan Handley #include <stdint.h>
13371a84445SDan Handley 
1344ecca339SDan Handley /*******************************************************************************
1354ecca339SDan Handley  * Function & variable prototypes
1364ecca339SDan Handley  ******************************************************************************/
137*6b477063SVikram Kanigiri void tzc400_init(uintptr_t base);
138*6b477063SVikram Kanigiri void tzc400_configure_region0(tzc_region_attributes_t sec_attr,
139*6b477063SVikram Kanigiri 			   unsigned int ns_device_access);
140*6b477063SVikram Kanigiri void tzc400_configure_region(unsigned int filters,
141*6b477063SVikram Kanigiri 			  int region,
142*6b477063SVikram Kanigiri 			  uintptr_t region_base,
143*6b477063SVikram Kanigiri 			  uintptr_t region_top,
1443279f625SDan Handley 			  tzc_region_attributes_t sec_attr,
145*6b477063SVikram Kanigiri 			  unsigned int ns_device_access);
146*6b477063SVikram Kanigiri void tzc400_set_action(tzc_action_t action);
147*6b477063SVikram Kanigiri void tzc400_enable_filters(void);
148*6b477063SVikram Kanigiri void tzc400_disable_filters(void);
149*6b477063SVikram Kanigiri 
150*6b477063SVikram Kanigiri /*
151*6b477063SVikram Kanigiri  * Deprecated APIs
152*6b477063SVikram Kanigiri  */
153*6b477063SVikram Kanigiri static inline void tzc_init(uintptr_t base) __deprecated;
154*6b477063SVikram Kanigiri static inline void tzc_configure_region0(
155*6b477063SVikram Kanigiri 			tzc_region_attributes_t sec_attr,
156*6b477063SVikram Kanigiri 			unsigned int ns_device_access) __deprecated;
157*6b477063SVikram Kanigiri static inline void tzc_configure_region(
158*6b477063SVikram Kanigiri 			  unsigned int filters,
159*6b477063SVikram Kanigiri 			  int region,
160*6b477063SVikram Kanigiri 			  uintptr_t region_base,
161*6b477063SVikram Kanigiri 			  uintptr_t region_top,
162*6b477063SVikram Kanigiri 			  tzc_region_attributes_t sec_attr,
163*6b477063SVikram Kanigiri 			  unsigned int ns_device_access) __deprecated;
164*6b477063SVikram Kanigiri static inline void tzc_set_action(tzc_action_t action) __deprecated;
165*6b477063SVikram Kanigiri static inline void tzc_enable_filters(void) __deprecated;
166*6b477063SVikram Kanigiri static inline void tzc_disable_filters(void) __deprecated;
167*6b477063SVikram Kanigiri 
168*6b477063SVikram Kanigiri static inline void tzc_init(uintptr_t base)
169*6b477063SVikram Kanigiri {
170*6b477063SVikram Kanigiri 	tzc400_init(base);
171*6b477063SVikram Kanigiri }
172*6b477063SVikram Kanigiri 
173*6b477063SVikram Kanigiri static inline void tzc_configure_region0(
174*6b477063SVikram Kanigiri 			tzc_region_attributes_t sec_attr,
175*6b477063SVikram Kanigiri 			unsigned int ns_device_access)
176*6b477063SVikram Kanigiri {
177*6b477063SVikram Kanigiri 	tzc400_configure_region0(sec_attr, ns_device_access);
178*6b477063SVikram Kanigiri }
179*6b477063SVikram Kanigiri 
180*6b477063SVikram Kanigiri static inline void tzc_configure_region(
181*6b477063SVikram Kanigiri 			  unsigned int filters,
182*6b477063SVikram Kanigiri 			  int region,
183*6b477063SVikram Kanigiri 			  uintptr_t region_base,
184*6b477063SVikram Kanigiri 			  uintptr_t region_top,
185*6b477063SVikram Kanigiri 			  tzc_region_attributes_t sec_attr,
186*6b477063SVikram Kanigiri 			  unsigned int ns_device_access)
187*6b477063SVikram Kanigiri {
188*6b477063SVikram Kanigiri 	tzc400_configure_region(filters, region, region_base,
189*6b477063SVikram Kanigiri 			region_top, sec_attr, ns_device_access);
190*6b477063SVikram Kanigiri }
191*6b477063SVikram Kanigiri 
192*6b477063SVikram Kanigiri static inline void tzc_set_action(tzc_action_t action)
193*6b477063SVikram Kanigiri {
194*6b477063SVikram Kanigiri 	tzc400_set_action(action);
195*6b477063SVikram Kanigiri }
196*6b477063SVikram Kanigiri 
197*6b477063SVikram Kanigiri 
198*6b477063SVikram Kanigiri static inline void tzc_enable_filters(void)
199*6b477063SVikram Kanigiri {
200*6b477063SVikram Kanigiri 	tzc400_enable_filters();
201*6b477063SVikram Kanigiri }
202*6b477063SVikram Kanigiri 
203*6b477063SVikram Kanigiri static inline void tzc_disable_filters(void)
204*6b477063SVikram Kanigiri {
205*6b477063SVikram Kanigiri 	tzc400_disable_filters();
206*6b477063SVikram Kanigiri }
2074ecca339SDan Handley 
20871a84445SDan Handley #endif /* __ASSEMBLY__ */
2094ecca339SDan Handley 
2104ecca339SDan Handley #endif /* __TZC400__ */
211