xref: /rk3399_ARM-atf/include/drivers/arm/tzc400.h (revision 4ecca33988b90de43ec4f4a929094a38a23fda31)
1*4ecca339SDan Handley /*
2*4ecca339SDan Handley  * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
3*4ecca339SDan Handley  *
4*4ecca339SDan Handley  * Redistribution and use in source and binary forms, with or without
5*4ecca339SDan Handley  * modification, are permitted provided that the following conditions are met:
6*4ecca339SDan Handley  *
7*4ecca339SDan Handley  * Redistributions of source code must retain the above copyright notice, this
8*4ecca339SDan Handley  * list of conditions and the following disclaimer.
9*4ecca339SDan Handley  *
10*4ecca339SDan Handley  * Redistributions in binary form must reproduce the above copyright notice,
11*4ecca339SDan Handley  * this list of conditions and the following disclaimer in the documentation
12*4ecca339SDan Handley  * and/or other materials provided with the distribution.
13*4ecca339SDan Handley  *
14*4ecca339SDan Handley  * Neither the name of ARM nor the names of its contributors may be used
15*4ecca339SDan Handley  * to endorse or promote products derived from this software without specific
16*4ecca339SDan Handley  * prior written permission.
17*4ecca339SDan Handley  *
18*4ecca339SDan Handley  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19*4ecca339SDan Handley  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20*4ecca339SDan Handley  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21*4ecca339SDan Handley  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22*4ecca339SDan Handley  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23*4ecca339SDan Handley  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24*4ecca339SDan Handley  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25*4ecca339SDan Handley  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26*4ecca339SDan Handley  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27*4ecca339SDan Handley  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28*4ecca339SDan Handley  * POSSIBILITY OF SUCH DAMAGE.
29*4ecca339SDan Handley  */
30*4ecca339SDan Handley 
31*4ecca339SDan Handley #ifndef __TZC400_H__
32*4ecca339SDan Handley #define __TZC400_H__
33*4ecca339SDan Handley 
34*4ecca339SDan Handley #include <stdint.h>
35*4ecca339SDan Handley 
36*4ecca339SDan Handley #define BUILD_CONFIG_OFF	0x000
37*4ecca339SDan Handley #define ACTION_OFF		0x004
38*4ecca339SDan Handley #define GATE_KEEPER_OFF		0x008
39*4ecca339SDan Handley #define SPECULATION_CTRL_OFF	0x00c
40*4ecca339SDan Handley #define INT_STATUS		0x010
41*4ecca339SDan Handley #define INT_CLEAR		0x014
42*4ecca339SDan Handley 
43*4ecca339SDan Handley #define FAIL_ADDRESS_LOW_OFF	0x020
44*4ecca339SDan Handley #define FAIL_ADDRESS_HIGH_OFF	0x024
45*4ecca339SDan Handley #define FAIL_CONTROL_OFF	0x028
46*4ecca339SDan Handley #define FAIL_ID			0x02c
47*4ecca339SDan Handley 
48*4ecca339SDan Handley #define REGION_BASE_LOW_OFF	0x100
49*4ecca339SDan Handley #define REGION_BASE_HIGH_OFF	0x104
50*4ecca339SDan Handley #define REGION_TOP_LOW_OFF	0x108
51*4ecca339SDan Handley #define REGION_TOP_HIGH_OFF	0x10c
52*4ecca339SDan Handley #define REGION_ATTRIBUTES_OFF	0x110
53*4ecca339SDan Handley #define REGION_ID_ACCESS_OFF	0x114
54*4ecca339SDan Handley #define REGION_NUM_OFF(region)  (0x20 * region)
55*4ecca339SDan Handley 
56*4ecca339SDan Handley /* ID Registers */
57*4ecca339SDan Handley #define PID0_OFF		0xfe0
58*4ecca339SDan Handley #define PID1_OFF		0xfe4
59*4ecca339SDan Handley #define PID2_OFF		0xfe8
60*4ecca339SDan Handley #define PID3_OFF		0xfec
61*4ecca339SDan Handley #define PID4_OFF		0xfd0
62*4ecca339SDan Handley #define PID5_OFF		0xfd4
63*4ecca339SDan Handley #define PID6_OFF		0xfd8
64*4ecca339SDan Handley #define PID7_OFF		0xfdc
65*4ecca339SDan Handley #define CID0_OFF		0xff0
66*4ecca339SDan Handley #define CID1_OFF		0xff4
67*4ecca339SDan Handley #define CID2_OFF		0xff8
68*4ecca339SDan Handley #define CID3_OFF		0xffc
69*4ecca339SDan Handley 
70*4ecca339SDan Handley #define BUILD_CONFIG_NF_SHIFT	24
71*4ecca339SDan Handley #define BUILD_CONFIG_NF_MASK	0x3
72*4ecca339SDan Handley #define BUILD_CONFIG_AW_SHIFT	8
73*4ecca339SDan Handley #define BUILD_CONFIG_AW_MASK	0x3f
74*4ecca339SDan Handley #define BUILD_CONFIG_NR_SHIFT	0
75*4ecca339SDan Handley #define BUILD_CONFIG_NR_MASK	0x1f
76*4ecca339SDan Handley 
77*4ecca339SDan Handley /* Not describing the case where regions 1 to 8 overlap */
78*4ecca339SDan Handley #define ACTION_RV_SHIFT		0
79*4ecca339SDan Handley #define ACTION_RV_MASK		0x3
80*4ecca339SDan Handley #define  ACTION_RV_LOWOK	0x0
81*4ecca339SDan Handley #define  ACTION_RV_LOWERR	0x1
82*4ecca339SDan Handley #define  ACTION_RV_HIGHOK	0x2
83*4ecca339SDan Handley #define  ACTION_RV_HIGHERR	0x3
84*4ecca339SDan Handley 
85*4ecca339SDan Handley /*
86*4ecca339SDan Handley  * Number of gate keepers is implementation defined. But we know the max for
87*4ecca339SDan Handley  * this device is 4. Get implementation details from BUILD_CONFIG.
88*4ecca339SDan Handley  */
89*4ecca339SDan Handley #define GATE_KEEPER_OS_SHIFT	16
90*4ecca339SDan Handley #define GATE_KEEPER_OS_MASK	0xf
91*4ecca339SDan Handley #define GATE_KEEPER_OR_SHIFT	0
92*4ecca339SDan Handley #define GATE_KEEPER_OR_MASK	0xf
93*4ecca339SDan Handley 
94*4ecca339SDan Handley /* Speculation is enabled by default. */
95*4ecca339SDan Handley #define SPECULATION_CTRL_WRITE_DISABLE	(1 << 1)
96*4ecca339SDan Handley #define SPECULATION_CTRL_READ_DISABLE	(1 << 0)
97*4ecca339SDan Handley 
98*4ecca339SDan Handley /* Max number of filters allowed is 4. */
99*4ecca339SDan Handley #define INT_STATUS_OVERLAP_SHIFT	16
100*4ecca339SDan Handley #define INT_STATUS_OVERLAP_MASK		0xf
101*4ecca339SDan Handley #define INT_STATUS_OVERRUN_SHIFT	8
102*4ecca339SDan Handley #define INT_STATUS_OVERRUN_MASK		0xf
103*4ecca339SDan Handley #define INT_STATUS_STATUS_SHIFT		0
104*4ecca339SDan Handley #define INT_STATUS_STATUS_MASK		0xf
105*4ecca339SDan Handley 
106*4ecca339SDan Handley #define INT_CLEAR_CLEAR_SHIFT		0
107*4ecca339SDan Handley #define INT_CLEAR_CLEAR_MASK		0xf
108*4ecca339SDan Handley 
109*4ecca339SDan Handley #define FAIL_CONTROL_DIR_SHIFT		(1 << 24)
110*4ecca339SDan Handley #define  FAIL_CONTROL_DIR_READ		0x0
111*4ecca339SDan Handley #define  FAIL_CONTROL_DIR_WRITE		0x1
112*4ecca339SDan Handley #define FAIL_CONTROL_NS_SHIFT		(1 << 21)
113*4ecca339SDan Handley #define  FAIL_CONTROL_NS_SECURE		0x0
114*4ecca339SDan Handley #define  FAIL_CONTROL_NS_NONSECURE	0x1
115*4ecca339SDan Handley #define FAIL_CONTROL_PRIV_SHIFT		(1 << 20)
116*4ecca339SDan Handley #define  FAIL_CONTROL_PRIV_PRIV		0x0
117*4ecca339SDan Handley #define  FAIL_CONTROL_PRIV_UNPRIV	0x1
118*4ecca339SDan Handley 
119*4ecca339SDan Handley /*
120*4ecca339SDan Handley  * FAIL_ID_ID_MASK depends on AID_WIDTH which is platform specific.
121*4ecca339SDan Handley  * Platform should provide the value on initialisation.
122*4ecca339SDan Handley  */
123*4ecca339SDan Handley #define FAIL_ID_VNET_SHIFT		24
124*4ecca339SDan Handley #define FAIL_ID_VNET_MASK		0xf
125*4ecca339SDan Handley #define FAIL_ID_ID_SHIFT		0
126*4ecca339SDan Handley 
127*4ecca339SDan Handley /* Used along with 'tzc_region_attributes_t' below */
128*4ecca339SDan Handley #define REGION_ATTRIBUTES_SEC_SHIFT	30
129*4ecca339SDan Handley #define REGION_ATTRIBUTES_F_EN_SHIFT	0
130*4ecca339SDan Handley #define REGION_ATTRIBUTES_F_EN_MASK	0xf
131*4ecca339SDan Handley 
132*4ecca339SDan Handley #define REGION_ID_ACCESS_NSAID_WR_EN_SHIFT	16
133*4ecca339SDan Handley #define REGION_ID_ACCESS_NSAID_RD_EN_SHIFT	0
134*4ecca339SDan Handley #define REGION_ID_ACCESS_NSAID_ID_MASK		0xf
135*4ecca339SDan Handley 
136*4ecca339SDan Handley 
137*4ecca339SDan Handley /* Macros for setting Region ID access permissions based on NSAID */
138*4ecca339SDan Handley #define TZC_REGION_ACCESS_RD(id)					\
139*4ecca339SDan Handley 		((1 << (id & REGION_ID_ACCESS_NSAID_ID_MASK)) <<	\
140*4ecca339SDan Handley 		 REGION_ID_ACCESS_NSAID_RD_EN_SHIFT)
141*4ecca339SDan Handley #define TZC_REGION_ACCESS_WR(id)					\
142*4ecca339SDan Handley 		((1 << (id & REGION_ID_ACCESS_NSAID_ID_MASK)) <<	\
143*4ecca339SDan Handley 		 REGION_ID_ACCESS_NSAID_WR_EN_SHIFT)
144*4ecca339SDan Handley #define TZC_REGION_ACCESS_RDWR(id)					\
145*4ecca339SDan Handley 		(TZC_REGION_ACCESS_RD(id) | TZC_REGION_ACCESS_WR(id))
146*4ecca339SDan Handley 
147*4ecca339SDan Handley /* Filters are bit mapped 0 to 3. */
148*4ecca339SDan Handley #define TZC400_COMPONENT_ID	0xb105f00d
149*4ecca339SDan Handley 
150*4ecca339SDan Handley #ifndef __ASSEMBLY__
151*4ecca339SDan Handley 
152*4ecca339SDan Handley /*******************************************************************************
153*4ecca339SDan Handley  * Function & variable prototypes
154*4ecca339SDan Handley  ******************************************************************************/
155*4ecca339SDan Handley 
156*4ecca339SDan Handley /*
157*4ecca339SDan Handley  * What type of action is expected when an access violation occurs.
158*4ecca339SDan Handley  * The memory requested is zeroed. But we can also raise and event to
159*4ecca339SDan Handley  * let the system know it happened.
160*4ecca339SDan Handley  * We can raise an interrupt(INT) and/or cause an exception(ERR).
161*4ecca339SDan Handley  *  TZC_ACTION_NONE    - No interrupt, no Exception
162*4ecca339SDan Handley  *  TZC_ACTION_ERR     - No interrupt, raise exception -> sync external
163*4ecca339SDan Handley  *                       data abort
164*4ecca339SDan Handley  *  TZC_ACTION_INT     - Raise interrupt, no exception
165*4ecca339SDan Handley  *  TZC_ACTION_ERR_INT - Raise interrupt, raise exception -> sync
166*4ecca339SDan Handley  *                       external data abort
167*4ecca339SDan Handley  */
168*4ecca339SDan Handley enum tzc_action {
169*4ecca339SDan Handley 	TZC_ACTION_NONE = 0,
170*4ecca339SDan Handley 	TZC_ACTION_ERR = 1,
171*4ecca339SDan Handley 	TZC_ACTION_INT = 2,
172*4ecca339SDan Handley 	TZC_ACTION_ERR_INT = (TZC_ACTION_ERR | TZC_ACTION_INT)
173*4ecca339SDan Handley };
174*4ecca339SDan Handley 
175*4ecca339SDan Handley /*
176*4ecca339SDan Handley  * Controls secure access to a region. If not enabled secure access is not
177*4ecca339SDan Handley  * allowed to region.
178*4ecca339SDan Handley  */
179*4ecca339SDan Handley enum tzc_region_attributes {
180*4ecca339SDan Handley 	TZC_REGION_S_NONE = 0,
181*4ecca339SDan Handley 	TZC_REGION_S_RD = 1,
182*4ecca339SDan Handley 	TZC_REGION_S_WR = 2,
183*4ecca339SDan Handley 	TZC_REGION_S_RDWR = (TZC_REGION_S_RD | TZC_REGION_S_WR)
184*4ecca339SDan Handley };
185*4ecca339SDan Handley 
186*4ecca339SDan Handley /*
187*4ecca339SDan Handley  * Implementation defined values used to validate inputs later.
188*4ecca339SDan Handley  * Filters : max of 4 ; 0 to 3
189*4ecca339SDan Handley  * Regions : max of 9 ; 0 to 8
190*4ecca339SDan Handley  * Address width : Values between 32 to 64
191*4ecca339SDan Handley  */
192*4ecca339SDan Handley struct tzc_instance {
193*4ecca339SDan Handley 	uint64_t base;
194*4ecca339SDan Handley 	uint32_t aid_width;
195*4ecca339SDan Handley 	uint8_t addr_width;
196*4ecca339SDan Handley 	uint8_t num_filters;
197*4ecca339SDan Handley 	uint8_t num_regions;
198*4ecca339SDan Handley };
199*4ecca339SDan Handley 
200*4ecca339SDan Handley void tzc_init(struct tzc_instance *controller);
201*4ecca339SDan Handley void tzc_configure_region(const struct tzc_instance *controller, uint32_t filters,
202*4ecca339SDan Handley 	uint8_t region, uint64_t region_base, uint64_t region_top,
203*4ecca339SDan Handley 	enum tzc_region_attributes sec_attr, uint32_t ns_device_access);
204*4ecca339SDan Handley void tzc_enable_filters(const struct tzc_instance *controller);
205*4ecca339SDan Handley void tzc_disable_filters(const struct tzc_instance *controller);
206*4ecca339SDan Handley void tzc_set_action(const struct tzc_instance *controller,
207*4ecca339SDan Handley 	enum tzc_action action);
208*4ecca339SDan Handley 
209*4ecca339SDan Handley #endif /*__ASSEMBLY__*/
210*4ecca339SDan Handley 
211*4ecca339SDan Handley #endif /* __TZC400__ */
212