1 /* 2 * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef SMMU_V3_H 8 #define SMMU_V3_H 9 10 #include <stdint.h> 11 #include <lib/utils_def.h> 12 #include <platform_def.h> 13 14 /* SMMUv3 register offsets from device base */ 15 #define SMMU_GBPA U(0x0044) 16 #define SMMU_S_IDR1 U(0x8004) 17 #define SMMU_S_INIT U(0x803c) 18 #define SMMU_S_GBPA U(0x8044) 19 20 /* 21 * TODO: SMMU_ROOT_PAGE_OFFSET is platform specific. 22 * Currently defined as a command line model parameter. 23 */ 24 #if ENABLE_RME 25 26 #define SMMU_ROOT_PAGE_OFFSET (PLAT_ARM_SMMUV3_ROOT_REG_OFFSET) 27 #define SMMU_ROOT_IDR0 U(SMMU_ROOT_PAGE_OFFSET + 0x0000) 28 #define SMMU_ROOT_IIDR U(SMMU_ROOT_PAGE_OFFSET + 0x0008) 29 #define SMMU_ROOT_CR0 U(SMMU_ROOT_PAGE_OFFSET + 0x0020) 30 #define SMMU_ROOT_CR0ACK U(SMMU_ROOT_PAGE_OFFSET + 0x0024) 31 #define SMMU_ROOT_GPT_BASE U(SMMU_ROOT_PAGE_OFFSET + 0x0028) 32 #define SMMU_ROOT_GPT_BASE_CFG U(SMMU_ROOT_PAGE_OFFSET + 0x0030) 33 #define SMMU_ROOT_GPF_FAR U(SMMU_ROOT_PAGE_OFFSET + 0x0038) 34 #define SMMU_ROOT_GPT_CFG_FAR U(SMMU_ROOT_PAGE_OFFSET + 0x0040) 35 #define SMMU_ROOT_TLBI U(SMMU_ROOT_PAGE_OFFSET + 0x0050) 36 #define SMMU_ROOT_TLBI_CTRL U(SMMU_ROOT_PAGE_OFFSET + 0x0058) 37 38 #endif /* ENABLE_RME */ 39 40 /* SMMU_GBPA register fields */ 41 #define SMMU_GBPA_UPDATE (1UL << 31) 42 #define SMMU_GBPA_ABORT (1UL << 20) 43 44 /* SMMU_S_IDR1 register fields */ 45 #define SMMU_S_IDR1_SECURE_IMPL (1UL << 31) 46 47 /* SMMU_S_INIT register fields */ 48 #define SMMU_S_INIT_INV_ALL (1UL << 0) 49 50 /* SMMU_S_GBPA register fields */ 51 #define SMMU_S_GBPA_UPDATE (1UL << 31) 52 #define SMMU_S_GBPA_ABORT (1UL << 20) 53 54 /* SMMU_ROOT_IDR0 register fields */ 55 #define SMMU_ROOT_IDR0_ROOT_IMPL (1UL << 0) 56 57 /* SMMU_ROOT_CR0 register fields */ 58 #define SMMU_ROOT_CR0_GPCEN (1UL << 1) 59 #define SMMU_ROOT_CR0_ACCESSEN (1UL << 0) 60 61 int smmuv3_init(uintptr_t smmu_base); 62 int smmuv3_security_init(uintptr_t smmu_base); 63 64 #endif /* SMMU_V3_H */ 65