1f79abf5eSAditya Angadi /* 2*e8166d3eSMadhukar Pappireddy * Copyright (c) 2019-2023, Arm Limited. All rights reserved. 3f79abf5eSAditya Angadi * 4f79abf5eSAditya Angadi * SPDX-License-Identifier: BSD-3-Clause 5f79abf5eSAditya Angadi */ 6f79abf5eSAditya Angadi 7f79abf5eSAditya Angadi #ifndef SBSA_H 8f79abf5eSAditya Angadi #define SBSA_H 9f79abf5eSAditya Angadi 10f79abf5eSAditya Angadi #include <stdint.h> 11f79abf5eSAditya Angadi 12*e8166d3eSMadhukar Pappireddy /* SBSA Secure Watchdog Register Offsets */ 13*e8166d3eSMadhukar Pappireddy /* Refresh frame */ 14*e8166d3eSMadhukar Pappireddy #define SBSA_WDOG_WRR_OFFSET UL(0x000) 15*e8166d3eSMadhukar Pappireddy #define SBSA_WDOG_WRR_REFRESH UL(0x1) 16*e8166d3eSMadhukar Pappireddy 17*e8166d3eSMadhukar Pappireddy /* Control and status frame */ 18f79abf5eSAditya Angadi #define SBSA_WDOG_WCS_OFFSET UL(0x000) 19f79abf5eSAditya Angadi #define SBSA_WDOG_WOR_LOW_OFFSET UL(0x008) 20f79abf5eSAditya Angadi #define SBSA_WDOG_WOR_HIGH_OFFSET UL(0x00C) 21f79abf5eSAditya Angadi 22f79abf5eSAditya Angadi #define SBSA_WDOG_WCS_EN U(0x1) 23f79abf5eSAditya Angadi 24f79abf5eSAditya Angadi #define SBSA_WDOG_WOR_WIDTH UL(48) 25f79abf5eSAditya Angadi 26f79abf5eSAditya Angadi void sbsa_wdog_start(uintptr_t base, uint64_t ms); 27f79abf5eSAditya Angadi void sbsa_wdog_stop(uintptr_t base); 28*e8166d3eSMadhukar Pappireddy void sbsa_wdog_refresh(uintptr_t refresh_base); 29f79abf5eSAditya Angadi 30f79abf5eSAditya Angadi #endif /* SBSA_H */ 31