xref: /rk3399_ARM-atf/include/drivers/arm/gicv5.h (revision 13b62814abb822e1841fd9430fa96da91d63b776)
18cef63d6SBoyan Karatotev /*
28cef63d6SBoyan Karatotev  * Copyright (c) 2025, Arm Limited and Contributors. All rights reserved.
38cef63d6SBoyan Karatotev  *
48cef63d6SBoyan Karatotev  * SPDX-License-Identifier: BSD-3-Clause
58cef63d6SBoyan Karatotev  */
68cef63d6SBoyan Karatotev 
78cef63d6SBoyan Karatotev #ifndef GICV5_H
88cef63d6SBoyan Karatotev #define GICV5_H
9*13b62814SBoyan Karatotev 
10*13b62814SBoyan Karatotev #ifndef __ASSEMBLER__
11*13b62814SBoyan Karatotev #include <stdbool.h>
12*13b62814SBoyan Karatotev #include <stdint.h>
13*13b62814SBoyan Karatotev #endif
14*13b62814SBoyan Karatotev 
15*13b62814SBoyan Karatotev #include <lib/utils_def.h>
16*13b62814SBoyan Karatotev 
17*13b62814SBoyan Karatotev /* Interrupt Domain definitions */
18*13b62814SBoyan Karatotev #define INTDMN_S				0
19*13b62814SBoyan Karatotev #define INTDMN_NS				1
20*13b62814SBoyan Karatotev #define INTDMN_EL3				2
21*13b62814SBoyan Karatotev #define INTDMN_RL				3
22*13b62814SBoyan Karatotev 
23*13b62814SBoyan Karatotev /* Trigger modes */
24*13b62814SBoyan Karatotev #define TM_EDGE					0
25*13b62814SBoyan Karatotev #define TM_LEVEL				1
26*13b62814SBoyan Karatotev 
27*13b62814SBoyan Karatotev #ifndef __ASSEMBLER__
28*13b62814SBoyan Karatotev 
29*13b62814SBoyan Karatotev struct gicv5_driver_data {
30*13b62814SBoyan Karatotev };
31*13b62814SBoyan Karatotev 
32*13b62814SBoyan Karatotev extern const struct gicv5_driver_data plat_gicv5_driver_data;
33*13b62814SBoyan Karatotev 
34*13b62814SBoyan Karatotev void gicv5_driver_init();
35*13b62814SBoyan Karatotev uint8_t gicv5_get_pending_interrupt_type(void);
36*13b62814SBoyan Karatotev bool gicv5_has_interrupt_type(unsigned int type);
37*13b62814SBoyan Karatotev #endif /* __ASSEMBLER__ */
388cef63d6SBoyan Karatotev #endif /* GICV5_H */
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