1 /* 2 * Copyright (c) 2021-2023, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef ETHOSN_H 8 #define ETHOSN_H 9 10 #include <lib/smccc.h> 11 12 /* Function numbers */ 13 #define ETHOSN_FNUM_VERSION U(0x50) 14 #define ETHOSN_FNUM_IS_SEC U(0x51) 15 #define ETHOSN_FNUM_HARD_RESET U(0x52) 16 #define ETHOSN_FNUM_SOFT_RESET U(0x53) 17 #define ETHOSN_FNUM_IS_SLEEPING U(0x54) 18 /* 0x55-0x5F reserved for future use */ 19 20 /* SMC64 function IDs */ 21 #define ETHOSN_FID_64(func_num) U(0xC2000000 | func_num) 22 #define ETHOSN_FID_VERSION_64 ETHOSN_FID_64(ETHOSN_FNUM_VERSION) 23 #define ETHOSN_FID_IS_SEC_64 ETHOSN_FID_64(ETHOSN_FNUM_IS_SEC) 24 #define ETHOSN_FID_HARD_RESET_64 ETHOSN_FID_64(ETHOSN_FNUM_HARD_RESET) 25 #define ETHOSN_FID_SOFT_RESET_64 ETHOSN_FID_64(ETHOSN_FNUM_SOFT_RESET) 26 27 /* SMC32 function IDs */ 28 #define ETHOSN_FID_32(func_num) U(0x82000000 | func_num) 29 #define ETHOSN_FID_VERSION_32 ETHOSN_FID_32(ETHOSN_FNUM_VERSION) 30 #define ETHOSN_FID_IS_SEC_32 ETHOSN_FID_32(ETHOSN_FNUM_IS_SEC) 31 #define ETHOSN_FID_HARD_RESET_32 ETHOSN_FID_32(ETHOSN_FNUM_HARD_RESET) 32 #define ETHOSN_FID_SOFT_RESET_32 ETHOSN_FID_32(ETHOSN_FNUM_SOFT_RESET) 33 34 #define ETHOSN_NUM_SMC_CALLS 8 35 36 /* Macro to identify function calls */ 37 #define ETHOSN_FID_MASK U(0xFFF0) 38 #define ETHOSN_FID_VALUE U(0x50) 39 #define is_ethosn_fid(_fid) (((_fid) & ETHOSN_FID_MASK) == ETHOSN_FID_VALUE) 40 41 /* Service version */ 42 #define ETHOSN_VERSION_MAJOR U(2) 43 #define ETHOSN_VERSION_MINOR U(2) 44 45 /* Return codes for function calls */ 46 #define ETHOSN_SUCCESS 0 47 #define ETHOSN_NOT_SUPPORTED -1 48 /* -2 Reserved for NOT_REQUIRED */ 49 #define ETHOSN_INVALID_PARAMETER -3 50 #define ETHOSN_FAILURE -4 51 #define ETHOSN_UNKNOWN_CORE_ADDRESS -5 52 #define ETHOSN_UNKNOWN_ALLOCATOR_IDX -6 53 54 /* 55 * Argument types for soft and hard resets to indicate whether to reset 56 * and reconfigure the NPU or only halt it 57 */ 58 #define ETHOSN_RESET_TYPE_FULL U(0) 59 #define ETHOSN_RESET_TYPE_HALT U(1) 60 61 uintptr_t ethosn_smc_handler(uint32_t smc_fid, 62 u_register_t core_addr, 63 u_register_t asset_alloc_idx, 64 u_register_t reset_type, 65 u_register_t x4, 66 void *cookie, 67 void *handle, 68 u_register_t flags); 69 70 #endif /* ETHOSN_H */ 71