1*fd6007deSAchin Gupta /* 2*fd6007deSAchin Gupta * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3*fd6007deSAchin Gupta * 4*fd6007deSAchin Gupta * Redistribution and use in source and binary forms, with or without 5*fd6007deSAchin Gupta * modification, are permitted provided that the following conditions are met: 6*fd6007deSAchin Gupta * 7*fd6007deSAchin Gupta * Redistributions of source code must retain the above copyright notice, this 8*fd6007deSAchin Gupta * list of conditions and the following disclaimer. 9*fd6007deSAchin Gupta * 10*fd6007deSAchin Gupta * Redistributions in binary form must reproduce the above copyright notice, 11*fd6007deSAchin Gupta * this list of conditions and the following disclaimer in the documentation 12*fd6007deSAchin Gupta * and/or other materials provided with the distribution. 13*fd6007deSAchin Gupta * 14*fd6007deSAchin Gupta * Neither the name of ARM nor the names of its contributors may be used 15*fd6007deSAchin Gupta * to endorse or promote products derived from this software without specific 16*fd6007deSAchin Gupta * prior written permission. 17*fd6007deSAchin Gupta * 18*fd6007deSAchin Gupta * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*fd6007deSAchin Gupta * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*fd6007deSAchin Gupta * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*fd6007deSAchin Gupta * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*fd6007deSAchin Gupta * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*fd6007deSAchin Gupta * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*fd6007deSAchin Gupta * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*fd6007deSAchin Gupta * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*fd6007deSAchin Gupta * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*fd6007deSAchin Gupta * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*fd6007deSAchin Gupta * POSSIBILITY OF SUCH DAMAGE. 29*fd6007deSAchin Gupta */ 30*fd6007deSAchin Gupta 31*fd6007deSAchin Gupta #ifndef __CCN_H__ 32*fd6007deSAchin Gupta #define __CCN_H__ 33*fd6007deSAchin Gupta 34*fd6007deSAchin Gupta /* 35*fd6007deSAchin Gupta * This macro defines the maximum number of master interfaces that reside on 36*fd6007deSAchin Gupta * Request nodes which the CCN driver can accommodate. The driver APIs to add 37*fd6007deSAchin Gupta * and remove Request nodes from snoop/dvm domains take a bit map of master 38*fd6007deSAchin Gupta * interfaces as inputs. The largest C data type that can be used is a 64-bit 39*fd6007deSAchin Gupta * unsigned integer. Hence the value of 64. The platform will have to ensure 40*fd6007deSAchin Gupta * that the master interfaces are numbered from 0-63. 41*fd6007deSAchin Gupta */ 42*fd6007deSAchin Gupta #define CCN_MAX_RN_MASTERS 64 43*fd6007deSAchin Gupta 44*fd6007deSAchin Gupta /* 45*fd6007deSAchin Gupta * The following constants define the various run modes that the platform can 46*fd6007deSAchin Gupta * request the CCN driver to place the L3 cache in. These map to the 47*fd6007deSAchin Gupta * programmable P-State values in a HN-F P-state register. 48*fd6007deSAchin Gupta */ 49*fd6007deSAchin Gupta #define CCN_L3_RUN_MODE_NOL3 0x0 /* HNF_PM_NOL3 */ 50*fd6007deSAchin Gupta #define CCN_L3_RUN_MODE_SFONLY 0x1 /* HNF_PM_SFONLY */ 51*fd6007deSAchin Gupta #define CCN_L3_RUN_MODE_HAM 0x2 /* HNF_PM_HALF */ 52*fd6007deSAchin Gupta #define CCN_L3_RUN_MODE_FAM 0x3 /* HNF_PM_FULL */ 53*fd6007deSAchin Gupta 54*fd6007deSAchin Gupta /* 55*fd6007deSAchin Gupta * The following macro takes the value returned from a read of a HN-F P-state 56*fd6007deSAchin Gupta * status register and returns the retention state value. 57*fd6007deSAchin Gupta */ 58*fd6007deSAchin Gupta #define CCN_GET_RETENTION_STATE(pstate) ((pstate >> 4) & 0x3) 59*fd6007deSAchin Gupta 60*fd6007deSAchin Gupta /* 61*fd6007deSAchin Gupta * The following macro takes the value returned from a read of a HN-F P-state 62*fd6007deSAchin Gupta * status register and returns the run state value. 63*fd6007deSAchin Gupta */ 64*fd6007deSAchin Gupta #define CCN_GET_RUN_STATE(pstate) (pstate & 0xf) 65*fd6007deSAchin Gupta 66*fd6007deSAchin Gupta #ifndef __ASSEMBLY__ 67*fd6007deSAchin Gupta #include <stdint.h> 68*fd6007deSAchin Gupta 69*fd6007deSAchin Gupta /* 70*fd6007deSAchin Gupta * This structure describes some of the implementation defined attributes of the 71*fd6007deSAchin Gupta * CCN IP. It is used by the platform port to specify these attributes in order 72*fd6007deSAchin Gupta * to initialise the CCN driver. The attributes are described below. 73*fd6007deSAchin Gupta * 74*fd6007deSAchin Gupta * 1. The 'num_masters' field specifies the total number of master interfaces 75*fd6007deSAchin Gupta * resident on Request nodes. 76*fd6007deSAchin Gupta * 77*fd6007deSAchin Gupta * 2. The 'master_to_rn_id_map' field is a ponter to an array in which each 78*fd6007deSAchin Gupta * index corresponds to a master interface and its value corresponds to the 79*fd6007deSAchin Gupta * Request node on which the master interface resides. 80*fd6007deSAchin Gupta * This field is not simply defined as an array of size CCN_MAX_RN_MASTERS. 81*fd6007deSAchin Gupta * In reality, a platform will have much fewer master * interfaces than 82*fd6007deSAchin Gupta * CCN_MAX_RN_MASTERS. With an array of this size, it would also have to 83*fd6007deSAchin Gupta * set the unused entries to a suitable value. Zeroing the array would not 84*fd6007deSAchin Gupta * be enough since 0 is also a valid node id. Hence, such an array is not 85*fd6007deSAchin Gupta * used. 86*fd6007deSAchin Gupta * 87*fd6007deSAchin Gupta * 3. The 'periphbase' field is the base address of the programmer's view of the 88*fd6007deSAchin Gupta * CCN IP. 89*fd6007deSAchin Gupta */ 90*fd6007deSAchin Gupta typedef struct ccn_desc { 91*fd6007deSAchin Gupta unsigned int num_masters; 92*fd6007deSAchin Gupta const unsigned char *master_to_rn_id_map; 93*fd6007deSAchin Gupta uintptr_t periphbase; 94*fd6007deSAchin Gupta } ccn_desc_t; 95*fd6007deSAchin Gupta 96*fd6007deSAchin Gupta 97*fd6007deSAchin Gupta void ccn_init(const ccn_desc_t *plat_ccn_desc); 98*fd6007deSAchin Gupta void ccn_enter_snoop_dvm_domain(unsigned long long master_iface_map); 99*fd6007deSAchin Gupta void ccn_exit_snoop_dvm_domain(unsigned long long master_iface_map); 100*fd6007deSAchin Gupta void ccn_enter_dvm_domain(unsigned long long master_iface_map); 101*fd6007deSAchin Gupta void ccn_exit_dvm_domain(unsigned long long master_iface_map); 102*fd6007deSAchin Gupta void ccn_set_l3_run_mode(unsigned int mode); 103*fd6007deSAchin Gupta void ccn_program_sys_addrmap(unsigned int sn0_id, 104*fd6007deSAchin Gupta unsigned int sn1_id, 105*fd6007deSAchin Gupta unsigned int sn2_id, 106*fd6007deSAchin Gupta unsigned int top_addr_bit0, 107*fd6007deSAchin Gupta unsigned int top_addr_bit1, 108*fd6007deSAchin Gupta unsigned char three_sn_en); 109*fd6007deSAchin Gupta unsigned int ccn_get_l3_run_mode(void); 110*fd6007deSAchin Gupta 111*fd6007deSAchin Gupta #endif /* __ASSEMBLY__ */ 112*fd6007deSAchin Gupta #endif /* __CCN_H__ */ 113