1ebf1ca10SSoby Mathew /* 2*0d65d5a4SDavid Hu * Copyright (c) 2017-2025, ARM Limited and Contributors. All rights reserved. 3ebf1ca10SSoby Mathew * 4ebf1ca10SSoby Mathew * SPDX-License-Identifier: BSD-3-Clause 5ebf1ca10SSoby Mathew */ 6c3cf06f1SAntonio Nino Diaz #ifndef ARM_GICV3_COMMON_H 7c3cf06f1SAntonio Nino Diaz #define ARM_GICV3_COMMON_H 8ebf1ca10SSoby Mathew 9ebf1ca10SSoby Mathew /******************************************************************************* 10ebf1ca10SSoby Mathew * GIC500/GIC600 Re-distributor interface registers & constants 11ebf1ca10SSoby Mathew ******************************************************************************/ 12ebf1ca10SSoby Mathew 13ebf1ca10SSoby Mathew /* GICR_WAKER implementation-defined bit definitions */ 14ebf1ca10SSoby Mathew #define WAKER_SL_SHIFT 0 15ebf1ca10SSoby Mathew #define WAKER_QSC_SHIFT 31 16ebf1ca10SSoby Mathew 17ebf1ca10SSoby Mathew #define WAKER_SL_BIT (1U << WAKER_SL_SHIFT) 18ebf1ca10SSoby Mathew #define WAKER_QSC_BIT (1U << WAKER_QSC_SHIFT) 19ebf1ca10SSoby Mathew 201fe27d71SAndre Przywara #define IIDR_MODEL_ARM_GIC_600 U(0x0200043b) 211fe27d71SAndre Przywara #define IIDR_MODEL_ARM_GIC_600AE U(0x0300043b) 221fe27d71SAndre Przywara #define IIDR_MODEL_ARM_GIC_700 U(0x0400043b) 23*0d65d5a4SDavid Hu #define IIDR_MODEL_ARM_GIC_720AE U(0x0700043b) 241fe27d71SAndre Przywara 2573a643eeSAndre Przywara #define PIDR_COMPONENT_ARM_DIST U(0x492) 2673a643eeSAndre Przywara #define PIDR_COMPONENT_ARM_REDIST U(0x493) 2773a643eeSAndre Przywara #define PIDR_COMPONENT_ARM_ITS U(0x494) 2873a643eeSAndre Przywara 29c3cf06f1SAntonio Nino Diaz #endif /* ARM_GICV3_COMMON_H */ 30