10bc752c9SSamuel Holland /* 20bc752c9SSamuel Holland * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. 30bc752c9SSamuel Holland * 40bc752c9SSamuel Holland * SPDX-License-Identifier: BSD-3-Clause 50bc752c9SSamuel Holland */ 60bc752c9SSamuel Holland 70bc752c9SSamuel Holland #ifndef AXP_H 80bc752c9SSamuel Holland #define AXP_H 90bc752c9SSamuel Holland 100bc752c9SSamuel Holland #include <stdint.h> 110bc752c9SSamuel Holland 1244702983SSamuel Holland #define AXP20X_MODE_REG 0x3e 1344702983SSamuel Holland #define AXP20X_MODE_I2C 0x00 1444702983SSamuel Holland #define AXP20X_MODE_RSB 0x7c 1544702983SSamuel Holland 160bc752c9SSamuel Holland #define NA 0xff 170bc752c9SSamuel Holland 180bc752c9SSamuel Holland enum { 190bc752c9SSamuel Holland AXP803_CHIP_ID = 0x41, 20f6d9c4caSSamuel Holland AXP805_CHIP_ID = 0x40, 210bc752c9SSamuel Holland }; 220bc752c9SSamuel Holland 230bc752c9SSamuel Holland struct axp_regulator { 240bc752c9SSamuel Holland const char *dt_name; 250bc752c9SSamuel Holland uint16_t min_volt; 260bc752c9SSamuel Holland uint16_t max_volt; 270bc752c9SSamuel Holland uint16_t step; 280bc752c9SSamuel Holland unsigned char split; 290bc752c9SSamuel Holland unsigned char volt_reg; 300bc752c9SSamuel Holland unsigned char switch_reg; 310bc752c9SSamuel Holland unsigned char switch_bit; 320bc752c9SSamuel Holland }; 330bc752c9SSamuel Holland 340bc752c9SSamuel Holland extern const uint8_t axp_chip_id; 350bc752c9SSamuel Holland extern const char *const axp_compatible; 360bc752c9SSamuel Holland extern const struct axp_regulator axp_regulators[]; 370bc752c9SSamuel Holland 380bc752c9SSamuel Holland /* 390bc752c9SSamuel Holland * Since the PMIC can be connected to multiple bus types, 400bc752c9SSamuel Holland * low-level read/write functions must be provided by the platform 410bc752c9SSamuel Holland */ 420bc752c9SSamuel Holland int axp_read(uint8_t reg); 430bc752c9SSamuel Holland int axp_write(uint8_t reg, uint8_t val); 440bc752c9SSamuel Holland int axp_clrsetbits(uint8_t reg, uint8_t clr_mask, uint8_t set_mask); 450bc752c9SSamuel Holland #define axp_clrbits(reg, clr_mask) axp_clrsetbits(reg, clr_mask, 0) 460bc752c9SSamuel Holland #define axp_setbits(reg, set_mask) axp_clrsetbits(reg, 0, set_mask) 470bc752c9SSamuel Holland 480bc752c9SSamuel Holland int axp_check_id(void); 490bc752c9SSamuel Holland void axp_power_off(void); 50*67412e4dSAndre Przywara 51*67412e4dSAndre Przywara #if SUNXI_SETUP_REGULATORS == 1 520bc752c9SSamuel Holland void axp_setup_regulators(const void *fdt); 53*67412e4dSAndre Przywara #else 54*67412e4dSAndre Przywara static inline void axp_setup_regulators(const void *fdt) 55*67412e4dSAndre Przywara { 56*67412e4dSAndre Przywara } 57*67412e4dSAndre Przywara #endif 580bc752c9SSamuel Holland 590bc752c9SSamuel Holland #endif /* AXP_H */ 60