xref: /rk3399_ARM-atf/include/common/ep_info.h (revision c948f77136c42a92d0bb660543a3600c36dcf7f1)
1 /*
2  * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef EP_INFO_H
8 #define EP_INFO_H
9 
10 #include <common/param_header.h>
11 #include <lib/utils_def.h>
12 
13 #define SECURE		U(0x0)
14 #define NON_SECURE	U(0x1)
15 #define sec_state_is_valid(s) (((s) == SECURE) || ((s) == NON_SECURE))
16 
17 /*******************************************************************************
18  * Constants that allow assembler code to access members of and the
19  * 'entry_point_info' structure at their correct offsets.
20  ******************************************************************************/
21 #define ENTRY_POINT_INFO_PC_OFFSET	U(0x08)
22 #ifdef AARCH32
23 #define ENTRY_POINT_INFO_LR_SVC_OFFSET	U(0x10)
24 #define ENTRY_POINT_INFO_ARGS_OFFSET	U(0x14)
25 #else
26 #define ENTRY_POINT_INFO_ARGS_OFFSET	U(0x18)
27 #endif
28 
29 /* The following are used to set/get image attributes. */
30 #define PARAM_EP_SECURITY_MASK		U(0x1)
31 
32 /* Secure or Non-secure image */
33 #define GET_SECURITY_STATE(x) ((x) & PARAM_EP_SECURITY_MASK)
34 #define SET_SECURITY_STATE(x, security) \
35 			((x) = ((x) & ~PARAM_EP_SECURITY_MASK) | (security))
36 
37 /* Endianness of the image. */
38 #define EP_EE_MASK		U(0x2)
39 #define EP_EE_SHIFT		U(1)
40 #define EP_EE_LITTLE		U(0x0)
41 #define EP_EE_BIG		U(0x2)
42 #define EP_GET_EE(x)		((x) & EP_EE_MASK)
43 #define EP_SET_EE(x, ee)	((x) = ((x) & ~EP_EE_MASK) | (ee))
44 
45 /* Enable or disable access to the secure timer from secure images. */
46 #define EP_ST_MASK		U(0x4)
47 #define EP_ST_DISABLE		U(0x0)
48 #define EP_ST_ENABLE		U(0x4)
49 #define EP_GET_ST(x)		((x) & EP_ST_MASK)
50 #define EP_SET_ST(x, ee)	((x) = ((x) & ~EP_ST_MASK) | (ee))
51 
52 /* Determine if an image is executable or not. */
53 #define EP_EXE_MASK		U(0x8)
54 #define NON_EXECUTABLE		U(0x0)
55 #define EXECUTABLE		U(0x8)
56 #define EP_GET_EXE(x)		((x) & EP_EXE_MASK)
57 #define EP_SET_EXE(x, ee)	((x) = ((x) & ~EP_EXE_MASK) | (ee))
58 
59 /* Flag to indicate the first image that is executed. */
60 #define EP_FIRST_EXE_MASK	U(0x10)
61 #define EP_FIRST_EXE		U(0x10)
62 #define EP_GET_FIRST_EXE(x)	((x) & EP_FIRST_EXE_MASK)
63 #define EP_SET_FIRST_EXE(x, ee)	((x) = ((x) & ~EP_FIRST_EXE_MASK) | (ee))
64 
65 #ifndef __ASSEMBLY__
66 
67 #include <stdint.h>
68 
69 #include <lib/cassert.h>
70 
71 typedef struct aapcs64_params {
72 	u_register_t arg0;
73 	u_register_t arg1;
74 	u_register_t arg2;
75 	u_register_t arg3;
76 	u_register_t arg4;
77 	u_register_t arg5;
78 	u_register_t arg6;
79 	u_register_t arg7;
80 } aapcs64_params_t;
81 
82 typedef struct aapcs32_params {
83 	u_register_t arg0;
84 	u_register_t arg1;
85 	u_register_t arg2;
86 	u_register_t arg3;
87 } aapcs32_params_t;
88 
89 /*****************************************************************************
90  * This structure represents the superset of information needed while
91  * switching exception levels. The only two mechanisms to do so are
92  * ERET & SMC. Security state is indicated using bit zero of header
93  * attribute
94  * NOTE: BL1 expects entrypoint followed by spsr at an offset from the start
95  * of this structure defined by the macro `ENTRY_POINT_INFO_PC_OFFSET` while
96  * processing SMC to jump to BL31.
97  *****************************************************************************/
98 typedef struct entry_point_info {
99 	param_header_t h;
100 	uintptr_t pc;
101 	uint32_t spsr;
102 #ifdef AARCH32
103 	uintptr_t lr_svc;
104 	aapcs32_params_t args;
105 #else
106 	aapcs64_params_t args;
107 #endif
108 } entry_point_info_t;
109 
110 /*
111  * Compile time assertions related to the 'entry_point_info' structure to
112  * ensure that the assembler and the compiler view of the offsets of
113  * the structure members is the same.
114  */
115 CASSERT(ENTRY_POINT_INFO_PC_OFFSET ==
116 		__builtin_offsetof(entry_point_info_t, pc), \
117 		assert_BL31_pc_offset_mismatch);
118 
119 #ifdef AARCH32
120 CASSERT(ENTRY_POINT_INFO_LR_SVC_OFFSET ==
121 		__builtin_offsetof(entry_point_info_t, lr_svc),
122 		assert_entrypoint_lr_offset_error);
123 #endif
124 
125 CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \
126 		__builtin_offsetof(entry_point_info_t, args), \
127 		assert_BL31_args_offset_mismatch);
128 
129 CASSERT(sizeof(uintptr_t) ==
130 		__builtin_offsetof(entry_point_info_t, spsr) - \
131 		__builtin_offsetof(entry_point_info_t, pc), \
132 		assert_entrypoint_and_spsr_should_be_adjacent);
133 
134 #endif /*__ASSEMBLY__*/
135 
136 #endif /* EP_INFO_H */
137