xref: /rk3399_ARM-atf/include/common/ep_info.h (revision 870ce3ddd3b33c59418a7dba703e8a66ec75f98f)
1 /*
2  * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef __EP_INFO_H__
8 #define __EP_INFO_H__
9 
10 #include <param_header.h>
11 #include <utils_def.h>
12 
13 #define SECURE		U(0x0)
14 #define NON_SECURE	U(0x1)
15 #define sec_state_is_valid(s) (((s) == SECURE) || ((s) == NON_SECURE))
16 
17 /*******************************************************************************
18  * Constants that allow assembler code to access members of and the
19  * 'entry_point_info' structure at their correct offsets.
20  ******************************************************************************/
21 #define ENTRY_POINT_INFO_PC_OFFSET	U(0x08)
22 #ifdef AARCH32
23 #define ENTRY_POINT_INFO_LR_SVC_OFFSET	U(0x10)
24 #define ENTRY_POINT_INFO_ARGS_OFFSET	U(0x14)
25 #else
26 #define ENTRY_POINT_INFO_ARGS_OFFSET	U(0x18)
27 #endif
28 
29 /* The following are used to set/get image attributes. */
30 #define PARAM_EP_SECURITY_MASK		U(0x1)
31 
32 /* Secure or Non-secure image */
33 #define GET_SECURITY_STATE(x) (x & PARAM_EP_SECURITY_MASK)
34 #define SET_SECURITY_STATE(x, security) \
35 			((x) = ((x) & ~PARAM_EP_SECURITY_MASK) | (security))
36 
37 /* Endianness of the image. */
38 #define EP_EE_MASK		U(0x2)
39 #define EP_EE_SHIFT		U(1)
40 #define EP_EE_LITTLE		U(0x0)
41 #define EP_EE_BIG		U(0x2)
42 #define EP_GET_EE(x)		((x) & EP_EE_MASK)
43 #define EP_SET_EE(x, ee)	((x) = ((x) & ~EP_EE_MASK) | (ee))
44 
45 /* Enable or disable access to the secure timer from secure images. */
46 #define EP_ST_MASK		U(0x4)
47 #define EP_ST_DISABLE		U(0x0)
48 #define EP_ST_ENABLE		U(0x4)
49 #define EP_GET_ST(x)		((x) & EP_ST_MASK)
50 #define EP_SET_ST(x, ee)	((x) = ((x) & ~EP_ST_MASK) | (ee))
51 
52 /* Determine if an image is executable or not. */
53 #define EP_EXE_MASK		U(0x8)
54 #define NON_EXECUTABLE		U(0x0)
55 #define EXECUTABLE		U(0x8)
56 #define EP_GET_EXE(x)		((x) & EP_EXE_MASK)
57 #define EP_SET_EXE(x, ee)	((x) = ((x) & ~EP_EXE_MASK) | (ee))
58 
59 /* Flag to indicate the first image that is executed. */
60 #define EP_FIRST_EXE_MASK	U(0x10)
61 #define EP_FIRST_EXE		U(0x10)
62 #define EP_GET_FIRST_EXE(x)	((x) & EP_FIRST_EXE_MASK)
63 #define EP_SET_FIRST_EXE(x, ee)	((x) = ((x) & ~EP_FIRST_EXE_MASK) | (ee))
64 
65 #ifndef __ASSEMBLY__
66 
67 #include <cassert.h>
68 #include <stdint.h>
69 
70 typedef struct aapcs64_params {
71 	u_register_t arg0;
72 	u_register_t arg1;
73 	u_register_t arg2;
74 	u_register_t arg3;
75 	u_register_t arg4;
76 	u_register_t arg5;
77 	u_register_t arg6;
78 	u_register_t arg7;
79 } aapcs64_params_t;
80 
81 typedef struct aapcs32_params {
82 	u_register_t arg0;
83 	u_register_t arg1;
84 	u_register_t arg2;
85 	u_register_t arg3;
86 } aapcs32_params_t;
87 
88 /*****************************************************************************
89  * This structure represents the superset of information needed while
90  * switching exception levels. The only two mechanisms to do so are
91  * ERET & SMC. Security state is indicated using bit zero of header
92  * attribute
93  * NOTE: BL1 expects entrypoint followed by spsr at an offset from the start
94  * of this structure defined by the macro `ENTRY_POINT_INFO_PC_OFFSET` while
95  * processing SMC to jump to BL31.
96  *****************************************************************************/
97 typedef struct entry_point_info {
98 	param_header_t h;
99 	uintptr_t pc;
100 	uint32_t spsr;
101 #ifdef AARCH32
102 	uintptr_t lr_svc;
103 	aapcs32_params_t args;
104 #else
105 	aapcs64_params_t args;
106 #endif
107 } entry_point_info_t;
108 
109 /*
110  * Compile time assertions related to the 'entry_point_info' structure to
111  * ensure that the assembler and the compiler view of the offsets of
112  * the structure members is the same.
113  */
114 CASSERT(ENTRY_POINT_INFO_PC_OFFSET ==
115 		__builtin_offsetof(entry_point_info_t, pc), \
116 		assert_BL31_pc_offset_mismatch);
117 
118 #ifdef AARCH32
119 CASSERT(ENTRY_POINT_INFO_LR_SVC_OFFSET ==
120 		__builtin_offsetof(entry_point_info_t, lr_svc),
121 		assert_entrypoint_lr_offset_error);
122 #endif
123 
124 CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \
125 		__builtin_offsetof(entry_point_info_t, args), \
126 		assert_BL31_args_offset_mismatch);
127 
128 CASSERT(sizeof(uintptr_t) ==
129 		__builtin_offsetof(entry_point_info_t, spsr) - \
130 		__builtin_offsetof(entry_point_info_t, pc), \
131 		assert_entrypoint_and_spsr_should_be_adjacent);
132 
133 #endif /*__ASSEMBLY__*/
134 
135 #endif /* __EP_INFO_H__ */
136 
137