1 /* 2 * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef BL_COMMON_LD_H 8 #define BL_COMMON_LD_H 9 10 #include <platform_def.h> 11 12 #ifdef __aarch64__ 13 #define STRUCT_ALIGN 8 14 #else 15 #define STRUCT_ALIGN 4 16 #endif 17 18 #define CPU_OPS \ 19 . = ALIGN(STRUCT_ALIGN); \ 20 __CPU_OPS_START__ = .; \ 21 KEEP(*(cpu_ops)) \ 22 __CPU_OPS_END__ = .; 23 24 #define PARSER_LIB_DESCS \ 25 . = ALIGN(STRUCT_ALIGN); \ 26 __PARSER_LIB_DESCS_START__ = .; \ 27 KEEP(*(.img_parser_lib_descs)) \ 28 __PARSER_LIB_DESCS_END__ = .; 29 30 #define RT_SVC_DESCS \ 31 . = ALIGN(STRUCT_ALIGN); \ 32 __RT_SVC_DESCS_START__ = .; \ 33 KEEP(*(rt_svc_descs)) \ 34 __RT_SVC_DESCS_END__ = .; 35 36 #define PMF_SVC_DESCS \ 37 . = ALIGN(STRUCT_ALIGN); \ 38 __PMF_SVC_DESCS_START__ = .; \ 39 KEEP(*(pmf_svc_descs)) \ 40 __PMF_SVC_DESCS_END__ = .; 41 42 #define FCONF_POPULATOR \ 43 . = ALIGN(STRUCT_ALIGN); \ 44 __FCONF_POPULATOR_START__ = .; \ 45 KEEP(*(.fconf_populator)) \ 46 __FCONF_POPULATOR_END__ = .; 47 48 /* 49 * Keep the .got section in the RO section as it is patched prior to enabling 50 * the MMU and having the .got in RO is better for security. GOT is a table of 51 * addresses so ensure pointer size alignment. 52 */ 53 #define GOT \ 54 . = ALIGN(STRUCT_ALIGN); \ 55 __GOT_START__ = .; \ 56 *(.got) \ 57 __GOT_END__ = .; 58 59 #define STACK_SECTION \ 60 stacks (NOLOAD) : { \ 61 __STACKS_START__ = .; \ 62 *(tzfw_normal_stacks) \ 63 __STACKS_END__ = .; \ 64 } 65 66 /* 67 * If BL doesn't use any bakery lock then __PERCPU_BAKERY_LOCK_SIZE__ 68 * will be zero. For this reason, the only two valid values for 69 * __PERCPU_BAKERY_LOCK_SIZE__ are 0 or the platform defined value 70 * PLAT_PERCPU_BAKERY_LOCK_SIZE. 71 */ 72 #ifdef PLAT_PERCPU_BAKERY_LOCK_SIZE 73 #define BAKERY_LOCK_SIZE_CHECK \ 74 ASSERT((__PERCPU_BAKERY_LOCK_SIZE__ == 0) || \ 75 (__PERCPU_BAKERY_LOCK_SIZE__ == PLAT_PERCPU_BAKERY_LOCK_SIZE), \ 76 "PLAT_PERCPU_BAKERY_LOCK_SIZE does not match bakery lock requirements"); 77 #else 78 #define BAKERY_LOCK_SIZE_CHECK 79 #endif 80 81 /* 82 * Bakery locks are stored in normal .bss memory 83 * 84 * Each lock's data is spread across multiple cache lines, one per CPU, 85 * but multiple locks can share the same cache line. 86 * The compiler will allocate enough memory for one CPU's bakery locks, 87 * the remaining cache lines are allocated by the linker script 88 */ 89 #if !USE_COHERENT_MEM 90 #define BAKERY_LOCK_NORMAL \ 91 . = ALIGN(CACHE_WRITEBACK_GRANULE); \ 92 __BAKERY_LOCK_START__ = .; \ 93 __PERCPU_BAKERY_LOCK_START__ = .; \ 94 *(bakery_lock) \ 95 . = ALIGN(CACHE_WRITEBACK_GRANULE); \ 96 __PERCPU_BAKERY_LOCK_END__ = .; \ 97 __PERCPU_BAKERY_LOCK_SIZE__ = ABSOLUTE(__PERCPU_BAKERY_LOCK_END__ - __PERCPU_BAKERY_LOCK_START__); \ 98 . = . + (__PERCPU_BAKERY_LOCK_SIZE__ * (PLATFORM_CORE_COUNT - 1)); \ 99 __BAKERY_LOCK_END__ = .; \ 100 BAKERY_LOCK_SIZE_CHECK 101 #else 102 #define BAKERY_LOCK_NORMAL 103 #endif 104 105 /* 106 * Time-stamps are stored in normal .bss memory 107 * 108 * The compiler will allocate enough memory for one CPU's time-stamps, 109 * the remaining memory for other CPUs is allocated by the 110 * linker script 111 */ 112 #define PMF_TIMESTAMP \ 113 . = ALIGN(CACHE_WRITEBACK_GRANULE); \ 114 __PMF_TIMESTAMP_START__ = .; \ 115 KEEP(*(pmf_timestamp_array)) \ 116 . = ALIGN(CACHE_WRITEBACK_GRANULE); \ 117 __PMF_PERCPU_TIMESTAMP_END__ = .; \ 118 __PERCPU_TIMESTAMP_SIZE__ = ABSOLUTE(. - __PMF_TIMESTAMP_START__); \ 119 . = . + (__PERCPU_TIMESTAMP_SIZE__ * (PLATFORM_CORE_COUNT - 1)); \ 120 __PMF_TIMESTAMP_END__ = .; 121 122 /* 123 * The xlat_table section is for full, aligned page tables (4K). 124 * Removing them from .bss avoids forcing 4K alignment on 125 * the .bss section. The tables are initialized to zero by the translation 126 * tables library. 127 */ 128 #define XLAT_TABLE_SECTION \ 129 xlat_table (NOLOAD) : { \ 130 *(xlat_table) \ 131 } 132 133 #endif /* BL_COMMON_LD_H */ 134