1665e71b8SMasahiro Yamada /* 2bb5b942eSYann Gautier * Copyright (c) 2020-2022, ARM Limited and Contributors. All rights reserved. 3665e71b8SMasahiro Yamada * 4665e71b8SMasahiro Yamada * SPDX-License-Identifier: BSD-3-Clause 5665e71b8SMasahiro Yamada */ 6665e71b8SMasahiro Yamada 7665e71b8SMasahiro Yamada #ifndef BL_COMMON_LD_H 8665e71b8SMasahiro Yamada #define BL_COMMON_LD_H 9665e71b8SMasahiro Yamada 109fb288a0SMasahiro Yamada #include <platform_def.h> 119fb288a0SMasahiro Yamada 129fb288a0SMasahiro Yamada #ifdef __aarch64__ 139fb288a0SMasahiro Yamada #define STRUCT_ALIGN 8 14a7739bc7SMasahiro Yamada #define BSS_ALIGN 16 159fb288a0SMasahiro Yamada #else 169fb288a0SMasahiro Yamada #define STRUCT_ALIGN 4 17a7739bc7SMasahiro Yamada #define BSS_ALIGN 8 189fb288a0SMasahiro Yamada #endif 199fb288a0SMasahiro Yamada 20caa3e7e0SMasahiro Yamada #ifndef DATA_ALIGN 21caa3e7e0SMasahiro Yamada #define DATA_ALIGN 1 22caa3e7e0SMasahiro Yamada #endif 23caa3e7e0SMasahiro Yamada 249fb288a0SMasahiro Yamada #define CPU_OPS \ 259fb288a0SMasahiro Yamada . = ALIGN(STRUCT_ALIGN); \ 269fb288a0SMasahiro Yamada __CPU_OPS_START__ = .; \ 27*da04341eSChris Kay KEEP(*(.cpu_ops)) \ 289fb288a0SMasahiro Yamada __CPU_OPS_END__ = .; 299fb288a0SMasahiro Yamada 309fb288a0SMasahiro Yamada #define PARSER_LIB_DESCS \ 319fb288a0SMasahiro Yamada . = ALIGN(STRUCT_ALIGN); \ 329fb288a0SMasahiro Yamada __PARSER_LIB_DESCS_START__ = .; \ 339fb288a0SMasahiro Yamada KEEP(*(.img_parser_lib_descs)) \ 349fb288a0SMasahiro Yamada __PARSER_LIB_DESCS_END__ = .; 359fb288a0SMasahiro Yamada 369fb288a0SMasahiro Yamada #define RT_SVC_DESCS \ 379fb288a0SMasahiro Yamada . = ALIGN(STRUCT_ALIGN); \ 389fb288a0SMasahiro Yamada __RT_SVC_DESCS_START__ = .; \ 39*da04341eSChris Kay KEEP(*(.rt_svc_descs)) \ 409fb288a0SMasahiro Yamada __RT_SVC_DESCS_END__ = .; 419fb288a0SMasahiro Yamada 427affa25cSMarc Bonnici #if SPMC_AT_EL3 437affa25cSMarc Bonnici #define EL3_LP_DESCS \ 447affa25cSMarc Bonnici . = ALIGN(STRUCT_ALIGN); \ 457affa25cSMarc Bonnici __EL3_LP_DESCS_START__ = .; \ 46*da04341eSChris Kay KEEP(*(.el3_lp_descs)) \ 477affa25cSMarc Bonnici __EL3_LP_DESCS_END__ = .; 487affa25cSMarc Bonnici #else 497affa25cSMarc Bonnici #define EL3_LP_DESCS 507affa25cSMarc Bonnici #endif 517affa25cSMarc Bonnici 529fb288a0SMasahiro Yamada #define PMF_SVC_DESCS \ 539fb288a0SMasahiro Yamada . = ALIGN(STRUCT_ALIGN); \ 549fb288a0SMasahiro Yamada __PMF_SVC_DESCS_START__ = .; \ 55*da04341eSChris Kay KEEP(*(.pmf_svc_descs)) \ 569fb288a0SMasahiro Yamada __PMF_SVC_DESCS_END__ = .; 579fb288a0SMasahiro Yamada 589fb288a0SMasahiro Yamada #define FCONF_POPULATOR \ 599fb288a0SMasahiro Yamada . = ALIGN(STRUCT_ALIGN); \ 609fb288a0SMasahiro Yamada __FCONF_POPULATOR_START__ = .; \ 619fb288a0SMasahiro Yamada KEEP(*(.fconf_populator)) \ 629fb288a0SMasahiro Yamada __FCONF_POPULATOR_END__ = .; 639fb288a0SMasahiro Yamada 649fb288a0SMasahiro Yamada /* 659fb288a0SMasahiro Yamada * Keep the .got section in the RO section as it is patched prior to enabling 669fb288a0SMasahiro Yamada * the MMU and having the .got in RO is better for security. GOT is a table of 679fb288a0SMasahiro Yamada * addresses so ensure pointer size alignment. 689fb288a0SMasahiro Yamada */ 699fb288a0SMasahiro Yamada #define GOT \ 709fb288a0SMasahiro Yamada . = ALIGN(STRUCT_ALIGN); \ 719fb288a0SMasahiro Yamada __GOT_START__ = .; \ 729fb288a0SMasahiro Yamada *(.got) \ 739fb288a0SMasahiro Yamada __GOT_END__ = .; 749fb288a0SMasahiro Yamada 75268131c2SMasahiro Yamada /* 76268131c2SMasahiro Yamada * The base xlat table 77268131c2SMasahiro Yamada * 78268131c2SMasahiro Yamada * It is put into the rodata section if PLAT_RO_XLAT_TABLES=1, 79268131c2SMasahiro Yamada * or into the bss section otherwise. 80268131c2SMasahiro Yamada */ 81268131c2SMasahiro Yamada #define BASE_XLAT_TABLE \ 82268131c2SMasahiro Yamada . = ALIGN(16); \ 83bb5b942eSYann Gautier __BASE_XLAT_TABLE_START__ = .; \ 84*da04341eSChris Kay *(.base_xlat_table) \ 85bb5b942eSYann Gautier __BASE_XLAT_TABLE_END__ = .; 86268131c2SMasahiro Yamada 87268131c2SMasahiro Yamada #if PLAT_RO_XLAT_TABLES 88268131c2SMasahiro Yamada #define BASE_XLAT_TABLE_RO BASE_XLAT_TABLE 89268131c2SMasahiro Yamada #define BASE_XLAT_TABLE_BSS 90268131c2SMasahiro Yamada #else 91268131c2SMasahiro Yamada #define BASE_XLAT_TABLE_RO 92268131c2SMasahiro Yamada #define BASE_XLAT_TABLE_BSS BASE_XLAT_TABLE 93268131c2SMasahiro Yamada #endif 94268131c2SMasahiro Yamada 950a0a7a9aSMasahiro Yamada #define RODATA_COMMON \ 960a0a7a9aSMasahiro Yamada RT_SVC_DESCS \ 970a0a7a9aSMasahiro Yamada FCONF_POPULATOR \ 980a0a7a9aSMasahiro Yamada PMF_SVC_DESCS \ 990a0a7a9aSMasahiro Yamada PARSER_LIB_DESCS \ 1000a0a7a9aSMasahiro Yamada CPU_OPS \ 101268131c2SMasahiro Yamada GOT \ 1027affa25cSMarc Bonnici BASE_XLAT_TABLE_RO \ 1037affa25cSMarc Bonnici EL3_LP_DESCS 1040a0a7a9aSMasahiro Yamada 105caa3e7e0SMasahiro Yamada /* 106caa3e7e0SMasahiro Yamada * .data must be placed at a lower address than the stacks if the stack 107caa3e7e0SMasahiro Yamada * protector is enabled. Alternatively, the .data.stack_protector_canary 108caa3e7e0SMasahiro Yamada * section can be placed independently of the main .data section. 109caa3e7e0SMasahiro Yamada */ 110caa3e7e0SMasahiro Yamada #define DATA_SECTION \ 111caa3e7e0SMasahiro Yamada .data . : ALIGN(DATA_ALIGN) { \ 112caa3e7e0SMasahiro Yamada __DATA_START__ = .; \ 113caa3e7e0SMasahiro Yamada *(SORT_BY_ALIGNMENT(.data*)) \ 114caa3e7e0SMasahiro Yamada __DATA_END__ = .; \ 115caa3e7e0SMasahiro Yamada } 116caa3e7e0SMasahiro Yamada 117e8ad6168SMasahiro Yamada /* 118e8ad6168SMasahiro Yamada * .rela.dyn needs to come after .data for the read-elf utility to parse 119e8ad6168SMasahiro Yamada * this section correctly. 120e8ad6168SMasahiro Yamada */ 1214324a14bSYann Gautier #if __aarch64__ 1224324a14bSYann Gautier #define RELA_DYN_NAME .rela.dyn 1234324a14bSYann Gautier #define RELOC_SECTIONS_PATTERN *(.rela*) 1244324a14bSYann Gautier #else 1254324a14bSYann Gautier #define RELA_DYN_NAME .rel.dyn 1264324a14bSYann Gautier #define RELOC_SECTIONS_PATTERN *(.rel*) 1274324a14bSYann Gautier #endif 1284324a14bSYann Gautier 129e8ad6168SMasahiro Yamada #define RELA_SECTION \ 1304324a14bSYann Gautier RELA_DYN_NAME : ALIGN(STRUCT_ALIGN) { \ 131e8ad6168SMasahiro Yamada __RELA_START__ = .; \ 1324324a14bSYann Gautier RELOC_SECTIONS_PATTERN \ 133e8ad6168SMasahiro Yamada __RELA_END__ = .; \ 134e8ad6168SMasahiro Yamada } 135e8ad6168SMasahiro Yamada 13634dd1e96SAlexei Fedorov #if !(defined(IMAGE_BL31) && RECLAIM_INIT_CODE) 1379fb288a0SMasahiro Yamada #define STACK_SECTION \ 138*da04341eSChris Kay .stacks (NOLOAD) : { \ 1399fb288a0SMasahiro Yamada __STACKS_START__ = .; \ 140*da04341eSChris Kay *(.tzfw_normal_stacks) \ 1419fb288a0SMasahiro Yamada __STACKS_END__ = .; \ 1429fb288a0SMasahiro Yamada } 14334dd1e96SAlexei Fedorov #endif 1449fb288a0SMasahiro Yamada 1459fb288a0SMasahiro Yamada /* 1469fb288a0SMasahiro Yamada * If BL doesn't use any bakery lock then __PERCPU_BAKERY_LOCK_SIZE__ 1479fb288a0SMasahiro Yamada * will be zero. For this reason, the only two valid values for 1489fb288a0SMasahiro Yamada * __PERCPU_BAKERY_LOCK_SIZE__ are 0 or the platform defined value 1499fb288a0SMasahiro Yamada * PLAT_PERCPU_BAKERY_LOCK_SIZE. 1509fb288a0SMasahiro Yamada */ 1519fb288a0SMasahiro Yamada #ifdef PLAT_PERCPU_BAKERY_LOCK_SIZE 1529fb288a0SMasahiro Yamada #define BAKERY_LOCK_SIZE_CHECK \ 1539fb288a0SMasahiro Yamada ASSERT((__PERCPU_BAKERY_LOCK_SIZE__ == 0) || \ 1549fb288a0SMasahiro Yamada (__PERCPU_BAKERY_LOCK_SIZE__ == PLAT_PERCPU_BAKERY_LOCK_SIZE), \ 1559fb288a0SMasahiro Yamada "PLAT_PERCPU_BAKERY_LOCK_SIZE does not match bakery lock requirements"); 1569fb288a0SMasahiro Yamada #else 1579fb288a0SMasahiro Yamada #define BAKERY_LOCK_SIZE_CHECK 1589fb288a0SMasahiro Yamada #endif 1599fb288a0SMasahiro Yamada 1609fb288a0SMasahiro Yamada /* 1619fb288a0SMasahiro Yamada * Bakery locks are stored in normal .bss memory 1629fb288a0SMasahiro Yamada * 1639fb288a0SMasahiro Yamada * Each lock's data is spread across multiple cache lines, one per CPU, 1649fb288a0SMasahiro Yamada * but multiple locks can share the same cache line. 1659fb288a0SMasahiro Yamada * The compiler will allocate enough memory for one CPU's bakery locks, 1669fb288a0SMasahiro Yamada * the remaining cache lines are allocated by the linker script 1679fb288a0SMasahiro Yamada */ 1689fb288a0SMasahiro Yamada #if !USE_COHERENT_MEM 1699fb288a0SMasahiro Yamada #define BAKERY_LOCK_NORMAL \ 1709fb288a0SMasahiro Yamada . = ALIGN(CACHE_WRITEBACK_GRANULE); \ 1719fb288a0SMasahiro Yamada __BAKERY_LOCK_START__ = .; \ 1729fb288a0SMasahiro Yamada __PERCPU_BAKERY_LOCK_START__ = .; \ 173*da04341eSChris Kay *(.bakery_lock) \ 1749fb288a0SMasahiro Yamada . = ALIGN(CACHE_WRITEBACK_GRANULE); \ 1759fb288a0SMasahiro Yamada __PERCPU_BAKERY_LOCK_END__ = .; \ 1769fb288a0SMasahiro Yamada __PERCPU_BAKERY_LOCK_SIZE__ = ABSOLUTE(__PERCPU_BAKERY_LOCK_END__ - __PERCPU_BAKERY_LOCK_START__); \ 1779fb288a0SMasahiro Yamada . = . + (__PERCPU_BAKERY_LOCK_SIZE__ * (PLATFORM_CORE_COUNT - 1)); \ 1789fb288a0SMasahiro Yamada __BAKERY_LOCK_END__ = .; \ 1799fb288a0SMasahiro Yamada BAKERY_LOCK_SIZE_CHECK 1809fb288a0SMasahiro Yamada #else 1819fb288a0SMasahiro Yamada #define BAKERY_LOCK_NORMAL 1829fb288a0SMasahiro Yamada #endif 1839fb288a0SMasahiro Yamada 1849fb288a0SMasahiro Yamada /* 1859fb288a0SMasahiro Yamada * Time-stamps are stored in normal .bss memory 1869fb288a0SMasahiro Yamada * 1879fb288a0SMasahiro Yamada * The compiler will allocate enough memory for one CPU's time-stamps, 1889fb288a0SMasahiro Yamada * the remaining memory for other CPUs is allocated by the 1899fb288a0SMasahiro Yamada * linker script 1909fb288a0SMasahiro Yamada */ 1919fb288a0SMasahiro Yamada #define PMF_TIMESTAMP \ 1929fb288a0SMasahiro Yamada . = ALIGN(CACHE_WRITEBACK_GRANULE); \ 1939fb288a0SMasahiro Yamada __PMF_TIMESTAMP_START__ = .; \ 194*da04341eSChris Kay KEEP(*(.pmf_timestamp_array)) \ 1959fb288a0SMasahiro Yamada . = ALIGN(CACHE_WRITEBACK_GRANULE); \ 1969fb288a0SMasahiro Yamada __PMF_PERCPU_TIMESTAMP_END__ = .; \ 1979fb288a0SMasahiro Yamada __PERCPU_TIMESTAMP_SIZE__ = ABSOLUTE(. - __PMF_TIMESTAMP_START__); \ 1989fb288a0SMasahiro Yamada . = . + (__PERCPU_TIMESTAMP_SIZE__ * (PLATFORM_CORE_COUNT - 1)); \ 1999fb288a0SMasahiro Yamada __PMF_TIMESTAMP_END__ = .; 2009fb288a0SMasahiro Yamada 201a7739bc7SMasahiro Yamada 202a7739bc7SMasahiro Yamada /* 203a7739bc7SMasahiro Yamada * The .bss section gets initialised to 0 at runtime. 204a7739bc7SMasahiro Yamada * Its base address has bigger alignment for better performance of the 205a7739bc7SMasahiro Yamada * zero-initialization code. 206a7739bc7SMasahiro Yamada */ 207a7739bc7SMasahiro Yamada #define BSS_SECTION \ 208a7739bc7SMasahiro Yamada .bss (NOLOAD) : ALIGN(BSS_ALIGN) { \ 209a7739bc7SMasahiro Yamada __BSS_START__ = .; \ 210a7739bc7SMasahiro Yamada *(SORT_BY_ALIGNMENT(.bss*)) \ 211a7739bc7SMasahiro Yamada *(COMMON) \ 212a7739bc7SMasahiro Yamada BAKERY_LOCK_NORMAL \ 213a7739bc7SMasahiro Yamada PMF_TIMESTAMP \ 214268131c2SMasahiro Yamada BASE_XLAT_TABLE_BSS \ 215a7739bc7SMasahiro Yamada __BSS_END__ = .; \ 216a7739bc7SMasahiro Yamada } 217a7739bc7SMasahiro Yamada 218665e71b8SMasahiro Yamada /* 219*da04341eSChris Kay * The .xlat_table section is for full, aligned page tables (4K). 220665e71b8SMasahiro Yamada * Removing them from .bss avoids forcing 4K alignment on 221665e71b8SMasahiro Yamada * the .bss section. The tables are initialized to zero by the translation 222665e71b8SMasahiro Yamada * tables library. 223665e71b8SMasahiro Yamada */ 224665e71b8SMasahiro Yamada #define XLAT_TABLE_SECTION \ 225*da04341eSChris Kay .xlat_table (NOLOAD) : { \ 226bb5b942eSYann Gautier __XLAT_TABLE_START__ = .; \ 227*da04341eSChris Kay *(.xlat_table) \ 228bb5b942eSYann Gautier __XLAT_TABLE_END__ = .; \ 229665e71b8SMasahiro Yamada } 230665e71b8SMasahiro Yamada 231665e71b8SMasahiro Yamada #endif /* BL_COMMON_LD_H */ 232