xref: /rk3399_ARM-atf/include/common/bl_common.ld.h (revision 9fb288a03ed2ced7706defbbf78f008e921e17e2)
1665e71b8SMasahiro Yamada /*
2665e71b8SMasahiro Yamada  * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
3665e71b8SMasahiro Yamada  *
4665e71b8SMasahiro Yamada  * SPDX-License-Identifier: BSD-3-Clause
5665e71b8SMasahiro Yamada  */
6665e71b8SMasahiro Yamada 
7665e71b8SMasahiro Yamada #ifndef BL_COMMON_LD_H
8665e71b8SMasahiro Yamada #define BL_COMMON_LD_H
9665e71b8SMasahiro Yamada 
10*9fb288a0SMasahiro Yamada #include <platform_def.h>
11*9fb288a0SMasahiro Yamada 
12*9fb288a0SMasahiro Yamada #ifdef __aarch64__
13*9fb288a0SMasahiro Yamada #define STRUCT_ALIGN	8
14*9fb288a0SMasahiro Yamada #else
15*9fb288a0SMasahiro Yamada #define STRUCT_ALIGN	4
16*9fb288a0SMasahiro Yamada #endif
17*9fb288a0SMasahiro Yamada 
18*9fb288a0SMasahiro Yamada #define CPU_OPS						\
19*9fb288a0SMasahiro Yamada 	. = ALIGN(STRUCT_ALIGN);			\
20*9fb288a0SMasahiro Yamada 	__CPU_OPS_START__ = .;				\
21*9fb288a0SMasahiro Yamada 	KEEP(*(cpu_ops))				\
22*9fb288a0SMasahiro Yamada 	__CPU_OPS_END__ = .;
23*9fb288a0SMasahiro Yamada 
24*9fb288a0SMasahiro Yamada #define PARSER_LIB_DESCS				\
25*9fb288a0SMasahiro Yamada 	. = ALIGN(STRUCT_ALIGN);			\
26*9fb288a0SMasahiro Yamada 	__PARSER_LIB_DESCS_START__ = .;			\
27*9fb288a0SMasahiro Yamada 	KEEP(*(.img_parser_lib_descs))			\
28*9fb288a0SMasahiro Yamada 	__PARSER_LIB_DESCS_END__ = .;
29*9fb288a0SMasahiro Yamada 
30*9fb288a0SMasahiro Yamada #define RT_SVC_DESCS					\
31*9fb288a0SMasahiro Yamada 	. = ALIGN(STRUCT_ALIGN);			\
32*9fb288a0SMasahiro Yamada 	__RT_SVC_DESCS_START__ = .;			\
33*9fb288a0SMasahiro Yamada 	KEEP(*(rt_svc_descs))				\
34*9fb288a0SMasahiro Yamada 	__RT_SVC_DESCS_END__ = .;
35*9fb288a0SMasahiro Yamada 
36*9fb288a0SMasahiro Yamada #define PMF_SVC_DESCS					\
37*9fb288a0SMasahiro Yamada 	. = ALIGN(STRUCT_ALIGN);			\
38*9fb288a0SMasahiro Yamada 	__PMF_SVC_DESCS_START__ = .;			\
39*9fb288a0SMasahiro Yamada 	KEEP(*(pmf_svc_descs))				\
40*9fb288a0SMasahiro Yamada 	__PMF_SVC_DESCS_END__ = .;
41*9fb288a0SMasahiro Yamada 
42*9fb288a0SMasahiro Yamada #define FCONF_POPULATOR					\
43*9fb288a0SMasahiro Yamada 	. = ALIGN(STRUCT_ALIGN);			\
44*9fb288a0SMasahiro Yamada 	__FCONF_POPULATOR_START__ = .;			\
45*9fb288a0SMasahiro Yamada 	KEEP(*(.fconf_populator))			\
46*9fb288a0SMasahiro Yamada 	__FCONF_POPULATOR_END__ = .;
47*9fb288a0SMasahiro Yamada 
48*9fb288a0SMasahiro Yamada /*
49*9fb288a0SMasahiro Yamada  * Keep the .got section in the RO section as it is patched prior to enabling
50*9fb288a0SMasahiro Yamada  * the MMU and having the .got in RO is better for security. GOT is a table of
51*9fb288a0SMasahiro Yamada  * addresses so ensure pointer size alignment.
52*9fb288a0SMasahiro Yamada  */
53*9fb288a0SMasahiro Yamada #define GOT						\
54*9fb288a0SMasahiro Yamada 	. = ALIGN(STRUCT_ALIGN);			\
55*9fb288a0SMasahiro Yamada 	__GOT_START__ = .;				\
56*9fb288a0SMasahiro Yamada 	*(.got)						\
57*9fb288a0SMasahiro Yamada 	__GOT_END__ = .;
58*9fb288a0SMasahiro Yamada 
59*9fb288a0SMasahiro Yamada #define STACK_SECTION					\
60*9fb288a0SMasahiro Yamada 	stacks (NOLOAD) : {				\
61*9fb288a0SMasahiro Yamada 		__STACKS_START__ = .;			\
62*9fb288a0SMasahiro Yamada 		*(tzfw_normal_stacks)			\
63*9fb288a0SMasahiro Yamada 		__STACKS_END__ = .;			\
64*9fb288a0SMasahiro Yamada 	}
65*9fb288a0SMasahiro Yamada 
66*9fb288a0SMasahiro Yamada /*
67*9fb288a0SMasahiro Yamada  * If BL doesn't use any bakery lock then __PERCPU_BAKERY_LOCK_SIZE__
68*9fb288a0SMasahiro Yamada  * will be zero. For this reason, the only two valid values for
69*9fb288a0SMasahiro Yamada  * __PERCPU_BAKERY_LOCK_SIZE__ are 0 or the platform defined value
70*9fb288a0SMasahiro Yamada  * PLAT_PERCPU_BAKERY_LOCK_SIZE.
71*9fb288a0SMasahiro Yamada  */
72*9fb288a0SMasahiro Yamada #ifdef PLAT_PERCPU_BAKERY_LOCK_SIZE
73*9fb288a0SMasahiro Yamada #define BAKERY_LOCK_SIZE_CHECK				\
74*9fb288a0SMasahiro Yamada 	ASSERT((__PERCPU_BAKERY_LOCK_SIZE__ == 0) ||	\
75*9fb288a0SMasahiro Yamada 	       (__PERCPU_BAKERY_LOCK_SIZE__ == PLAT_PERCPU_BAKERY_LOCK_SIZE), \
76*9fb288a0SMasahiro Yamada 	       "PLAT_PERCPU_BAKERY_LOCK_SIZE does not match bakery lock requirements");
77*9fb288a0SMasahiro Yamada #else
78*9fb288a0SMasahiro Yamada #define BAKERY_LOCK_SIZE_CHECK
79*9fb288a0SMasahiro Yamada #endif
80*9fb288a0SMasahiro Yamada 
81*9fb288a0SMasahiro Yamada /*
82*9fb288a0SMasahiro Yamada  * Bakery locks are stored in normal .bss memory
83*9fb288a0SMasahiro Yamada  *
84*9fb288a0SMasahiro Yamada  * Each lock's data is spread across multiple cache lines, one per CPU,
85*9fb288a0SMasahiro Yamada  * but multiple locks can share the same cache line.
86*9fb288a0SMasahiro Yamada  * The compiler will allocate enough memory for one CPU's bakery locks,
87*9fb288a0SMasahiro Yamada  * the remaining cache lines are allocated by the linker script
88*9fb288a0SMasahiro Yamada  */
89*9fb288a0SMasahiro Yamada #if !USE_COHERENT_MEM
90*9fb288a0SMasahiro Yamada #define BAKERY_LOCK_NORMAL				\
91*9fb288a0SMasahiro Yamada 	. = ALIGN(CACHE_WRITEBACK_GRANULE);		\
92*9fb288a0SMasahiro Yamada 	__BAKERY_LOCK_START__ = .;			\
93*9fb288a0SMasahiro Yamada 	__PERCPU_BAKERY_LOCK_START__ = .;		\
94*9fb288a0SMasahiro Yamada 	*(bakery_lock)					\
95*9fb288a0SMasahiro Yamada 	. = ALIGN(CACHE_WRITEBACK_GRANULE);		\
96*9fb288a0SMasahiro Yamada 	__PERCPU_BAKERY_LOCK_END__ = .;			\
97*9fb288a0SMasahiro Yamada 	__PERCPU_BAKERY_LOCK_SIZE__ = ABSOLUTE(__PERCPU_BAKERY_LOCK_END__ - __PERCPU_BAKERY_LOCK_START__); \
98*9fb288a0SMasahiro Yamada 	. = . + (__PERCPU_BAKERY_LOCK_SIZE__ * (PLATFORM_CORE_COUNT - 1)); \
99*9fb288a0SMasahiro Yamada 	__BAKERY_LOCK_END__ = .;			\
100*9fb288a0SMasahiro Yamada 	BAKERY_LOCK_SIZE_CHECK
101*9fb288a0SMasahiro Yamada #else
102*9fb288a0SMasahiro Yamada #define BAKERY_LOCK_NORMAL
103*9fb288a0SMasahiro Yamada #endif
104*9fb288a0SMasahiro Yamada 
105*9fb288a0SMasahiro Yamada /*
106*9fb288a0SMasahiro Yamada  * Time-stamps are stored in normal .bss memory
107*9fb288a0SMasahiro Yamada  *
108*9fb288a0SMasahiro Yamada  * The compiler will allocate enough memory for one CPU's time-stamps,
109*9fb288a0SMasahiro Yamada  * the remaining memory for other CPUs is allocated by the
110*9fb288a0SMasahiro Yamada  * linker script
111*9fb288a0SMasahiro Yamada  */
112*9fb288a0SMasahiro Yamada #define PMF_TIMESTAMP					\
113*9fb288a0SMasahiro Yamada 	. = ALIGN(CACHE_WRITEBACK_GRANULE);		\
114*9fb288a0SMasahiro Yamada 	__PMF_TIMESTAMP_START__ = .;			\
115*9fb288a0SMasahiro Yamada 	KEEP(*(pmf_timestamp_array))			\
116*9fb288a0SMasahiro Yamada 	. = ALIGN(CACHE_WRITEBACK_GRANULE);		\
117*9fb288a0SMasahiro Yamada 	__PMF_PERCPU_TIMESTAMP_END__ = .;		\
118*9fb288a0SMasahiro Yamada 	__PERCPU_TIMESTAMP_SIZE__ = ABSOLUTE(. - __PMF_TIMESTAMP_START__); \
119*9fb288a0SMasahiro Yamada 	. = . + (__PERCPU_TIMESTAMP_SIZE__ * (PLATFORM_CORE_COUNT - 1)); \
120*9fb288a0SMasahiro Yamada 	__PMF_TIMESTAMP_END__ = .;
121*9fb288a0SMasahiro Yamada 
122665e71b8SMasahiro Yamada /*
123665e71b8SMasahiro Yamada  * The xlat_table section is for full, aligned page tables (4K).
124665e71b8SMasahiro Yamada  * Removing them from .bss avoids forcing 4K alignment on
125665e71b8SMasahiro Yamada  * the .bss section. The tables are initialized to zero by the translation
126665e71b8SMasahiro Yamada  * tables library.
127665e71b8SMasahiro Yamada  */
128665e71b8SMasahiro Yamada #define XLAT_TABLE_SECTION				\
129665e71b8SMasahiro Yamada 	xlat_table (NOLOAD) : {				\
130665e71b8SMasahiro Yamada 		*(xlat_table)				\
131665e71b8SMasahiro Yamada 	}
132665e71b8SMasahiro Yamada 
133665e71b8SMasahiro Yamada #endif /* BL_COMMON_LD_H */
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