xref: /rk3399_ARM-atf/include/common/bl_common.h (revision dd2bdee61682df0ec65dfc43371c126a86a30c30)
1 /*
2  * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * Redistributions of source code must retain the above copyright notice, this
8  * list of conditions and the following disclaimer.
9  *
10  * Redistributions in binary form must reproduce the above copyright notice,
11  * this list of conditions and the following disclaimer in the documentation
12  * and/or other materials provided with the distribution.
13  *
14  * Neither the name of ARM nor the names of its contributors may be used
15  * to endorse or promote products derived from this software without specific
16  * prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #ifndef __BL_COMMON_H__
32 #define __BL_COMMON_H__
33 
34 #define SECURE		0x0
35 #define NON_SECURE	0x1
36 #define sec_state_is_valid(s) (((s) == SECURE) || ((s) == NON_SECURE))
37 
38 #define UP	1
39 #define DOWN	0
40 
41 /*******************************************************************************
42  * Constants to identify the location of a memory region in a given memory
43  * layout.
44 ******************************************************************************/
45 #define TOP	0x1
46 #define BOTTOM	!TOP
47 
48 /******************************************************************************
49  * Opcode passed in x0 to tell next EL that we want to run an image.
50  * Corresponds to the function ID of the only SMC that the BL1 exception
51  * handlers service. That's why the chosen value is the first function ID of
52  * the ARM SMC64 range.
53  *****************************************************************************/
54 #define RUN_IMAGE	0xC0000000
55 
56 /*******************************************************************************
57  * Constants that allow assembler code to access members of and the
58  * 'entry_point_info' structure at their correct offsets.
59  ******************************************************************************/
60 #define ENTRY_POINT_INFO_PC_OFFSET	0x08
61 #define ENTRY_POINT_INFO_ARGS_OFFSET	0x18
62 
63 #define PARAM_EP_SECURITY_MASK    0x1
64 #define GET_SECURITY_STATE(x) (x & PARAM_EP_SECURITY_MASK)
65 #define SET_SECURITY_STATE(x, security) \
66 			((x) = ((x) & ~PARAM_EP_SECURITY_MASK) | (security))
67 
68 #define EP_EE_MASK	0x2
69 #define EP_EE_LITTLE	0x0
70 #define EP_EE_BIG	0x2
71 #define EP_GET_EE(x) (x & EP_EE_MASK)
72 #define EP_SET_EE(x, ee) ((x) = ((x) & ~EP_EE_MASK) | (ee))
73 
74 #define EP_ST_MASK	0x4
75 #define EP_ST_DISABLE	0x0
76 #define EP_ST_ENABLE	0x4
77 #define EP_GET_ST(x) (x & EP_ST_MASK)
78 #define EP_SET_ST(x, ee) ((x) = ((x) & ~EP_ST_MASK) | (ee))
79 
80 #define PARAM_EP     0x01
81 #define PARAM_IMAGE_BINARY  0x02
82 #define PARAM_BL31       0x03
83 
84 #define VERSION_1		0x01
85 
86 #define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \
87 	(_p)->h.type = (uint8_t)(_type); \
88 	(_p)->h.version = (uint8_t)(_ver); \
89 	(_p)->h.size = (uint16_t)sizeof(*_p); \
90 	(_p)->h.attr = (uint32_t)(_attr) ; \
91 	} while (0)
92 
93 #ifndef __ASSEMBLY__
94 #include <cdefs.h> /* For __dead2 */
95 #include <cassert.h>
96 #include <stdint.h>
97 #include <stddef.h>
98 
99 /*******************************************************************************
100  * Structure used for telling the next BL how much of a particular type of
101  * memory is available for its use and how much is already used.
102  ******************************************************************************/
103 typedef struct meminfo {
104 	uint64_t total_base;
105 	size_t total_size;
106 	uint64_t free_base;
107 	size_t free_size;
108 } meminfo_t;
109 
110 typedef struct aapcs64_params {
111 	unsigned long arg0;
112 	unsigned long arg1;
113 	unsigned long arg2;
114 	unsigned long arg3;
115 	unsigned long arg4;
116 	unsigned long arg5;
117 	unsigned long arg6;
118 	unsigned long arg7;
119 } aapcs64_params_t;
120 
121 /***************************************************************************
122  * This structure provides version information and the size of the
123  * structure, attributes for the structure it represents
124  ***************************************************************************/
125 typedef struct param_header {
126 	uint8_t type;		/* type of the structure */
127 	uint8_t version;    /* version of this structure */
128 	uint16_t size;      /* size of this structure in bytes */
129 	uint32_t attr;      /* attributes: unused bits SBZ */
130 } param_header_t;
131 
132 /*****************************************************************************
133  * This structure represents the superset of information needed while
134  * switching exception levels. The only two mechanisms to do so are
135  * ERET & SMC. Security state is indicated using bit zero of header
136  * attribute
137  * NOTE: BL1 expects entrypoint followed by spsr while processing
138  * SMC to jump to BL31 from the start of entry_point_info
139  *****************************************************************************/
140 typedef struct entry_point_info {
141 	param_header_t h;
142 	uintptr_t pc;
143 	uint32_t spsr;
144 	aapcs64_params_t args;
145 } entry_point_info_t;
146 
147 /*****************************************************************************
148  * Image info binary provides information from the image loader that
149  * can be used by the firmware to manage available trusted RAM.
150  * More advanced firmware image formats can provide additional
151  * information that enables optimization or greater flexibility in the
152  * common firmware code
153  *****************************************************************************/
154 typedef struct image_info {
155 	param_header_t h;
156 	uintptr_t image_base;   /* physical address of base of image */
157 	uint32_t image_size;    /* bytes read from image file */
158 } image_info_t;
159 
160 /*******************************************************************************
161  * This structure represents the superset of information that can be passed to
162  * BL31 e.g. while passing control to it from BL2. The BL32 parameters will be
163  * populated only if BL2 detects its presence. A pointer to a structure of this
164  * type should be passed in X3 to BL31's cold boot entrypoint
165  *
166  * Use of this structure and the X3 parameter is not mandatory: the BL3-1
167  * platform code can use other mechanisms to provide the necessary information
168  * about BL3-2 and BL3-3 to the common and SPD code.
169  *
170  * BL3-1 image information is mandatory if this structure is used. If either of
171  * the optional BL3-2 and BL3-3 image information is not provided, this is
172  * indicated by the respective image_info pointers being zero.
173  ******************************************************************************/
174 typedef struct bl31_params {
175 	param_header_t h;
176 	image_info_t *bl31_image_info;
177 	entry_point_info_t *bl32_ep_info;
178 	image_info_t *bl32_image_info;
179 	entry_point_info_t *bl33_ep_info;
180 	image_info_t *bl33_image_info;
181 } bl31_params_t;
182 
183 
184 /*
185  * Compile time assertions related to the 'entry_point_info' structure to
186  * ensure that the assembler and the compiler view of the offsets of
187  * the structure members is the same.
188  */
189 CASSERT(ENTRY_POINT_INFO_PC_OFFSET ==
190 		__builtin_offsetof(entry_point_info_t, pc), \
191 		assert_BL31_pc_offset_mismatch);
192 
193 CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \
194 		__builtin_offsetof(entry_point_info_t, args), \
195 		assert_BL31_args_offset_mismatch);
196 
197 CASSERT(sizeof(unsigned long) ==
198 		__builtin_offsetof(entry_point_info_t, spsr) - \
199 		__builtin_offsetof(entry_point_info_t, pc), \
200 		assert_entrypoint_and_spsr_should_be_adjacent);
201 
202 /*******************************************************************************
203  * Function & variable prototypes
204  ******************************************************************************/
205 unsigned long page_align(unsigned long, unsigned);
206 void change_security_state(unsigned int);
207 unsigned long image_size(const char *);
208 int load_image(meminfo_t *mem_layout,
209 	       const char *image_name,
210 	       uint64_t image_base,
211 	       image_info_t *image_data,
212 	       entry_point_info_t *entry_point_info);
213 extern const char build_message[];
214 extern const char version_string[];
215 
216 void reserve_mem(uint64_t *free_base, size_t *free_size,
217 		uint64_t addr, size_t size);
218 
219 #endif /*__ASSEMBLY__*/
220 
221 #endif /* __BL_COMMON_H__ */
222