1 /* 2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef __BL_COMMON_H__ 32 #define __BL_COMMON_H__ 33 34 #define SECURE 0x0 35 #define NON_SECURE 0x1 36 #define sec_state_is_valid(s) (((s) == SECURE) || ((s) == NON_SECURE)) 37 38 #define UP 1 39 #define DOWN 0 40 41 /******************************************************************************* 42 * Constants to identify the location of a memory region in a given memory 43 * layout. 44 ******************************************************************************/ 45 #define TOP 0x1 46 #define BOTTOM !TOP 47 48 /****************************************************************************** 49 * Corresponds to the function ID of the only SMC that the BL1 exception 50 * handlers service. That's why the chosen value is the first function ID of 51 * the ARM SMC64 range. 52 *****************************************************************************/ 53 #define RUN_IMAGE 0xC0000000 54 55 /******************************************************************************* 56 * Constants that allow assembler code to access members of and the 57 * 'entry_point_info' structure at their correct offsets. 58 ******************************************************************************/ 59 #define ENTRY_POINT_INFO_PC_OFFSET 0x08 60 #define ENTRY_POINT_INFO_ARGS_OFFSET 0x18 61 62 #define PARAM_EP_SECURITY_MASK 0x1 63 #define GET_SECURITY_STATE(x) (x & PARAM_EP_SECURITY_MASK) 64 #define SET_SECURITY_STATE(x, security) \ 65 ((x) = ((x) & ~PARAM_EP_SECURITY_MASK) | (security)) 66 67 #define EP_EE_MASK 0x2 68 #define EP_EE_LITTLE 0x0 69 #define EP_EE_BIG 0x2 70 #define EP_GET_EE(x) (x & EP_EE_MASK) 71 #define EP_SET_EE(x, ee) ((x) = ((x) & ~EP_EE_MASK) | (ee)) 72 73 #define EP_ST_MASK 0x4 74 #define EP_ST_DISABLE 0x0 75 #define EP_ST_ENABLE 0x4 76 #define EP_GET_ST(x) (x & EP_ST_MASK) 77 #define EP_SET_ST(x, ee) ((x) = ((x) & ~EP_ST_MASK) | (ee)) 78 79 #define PARAM_EP 0x01 80 #define PARAM_IMAGE_BINARY 0x02 81 #define PARAM_BL31 0x03 82 83 #define VERSION_1 0x01 84 85 #define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \ 86 (_p)->h.type = (uint8_t)(_type); \ 87 (_p)->h.version = (uint8_t)(_ver); \ 88 (_p)->h.size = (uint16_t)sizeof(*_p); \ 89 (_p)->h.attr = (uint32_t)(_attr) ; \ 90 } while (0) 91 92 /******************************************************************************* 93 * Constants to indicate type of exception to the common exception handler. 94 ******************************************************************************/ 95 #define SYNC_EXCEPTION_SP_EL0 0x0 96 #define IRQ_SP_EL0 0x1 97 #define FIQ_SP_EL0 0x2 98 #define SERROR_SP_EL0 0x3 99 #define SYNC_EXCEPTION_SP_ELX 0x4 100 #define IRQ_SP_ELX 0x5 101 #define FIQ_SP_ELX 0x6 102 #define SERROR_SP_ELX 0x7 103 #define SYNC_EXCEPTION_AARCH64 0x8 104 #define IRQ_AARCH64 0x9 105 #define FIQ_AARCH64 0xa 106 #define SERROR_AARCH64 0xb 107 #define SYNC_EXCEPTION_AARCH32 0xc 108 #define IRQ_AARCH32 0xd 109 #define FIQ_AARCH32 0xe 110 #define SERROR_AARCH32 0xf 111 112 #ifndef __ASSEMBLY__ 113 #include <cdefs.h> /* For __dead2 */ 114 #include <cassert.h> 115 #include <stdint.h> 116 #include <stddef.h> 117 118 #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) 119 120 /* 121 * Declarations of linker defined symbols to help determine memory layout of 122 * BL images 123 */ 124 extern unsigned long __RO_START__; 125 extern unsigned long __RO_END__; 126 #if IMAGE_BL2 127 extern unsigned long __BL2_END__; 128 #elif IMAGE_BL31 129 extern unsigned long __BL31_END__; 130 #elif IMAGE_BL32 131 extern unsigned long __BL32_END__; 132 #endif /* IMAGE_BLX */ 133 134 #if USE_COHERENT_MEM 135 extern unsigned long __COHERENT_RAM_START__; 136 extern unsigned long __COHERENT_RAM_END__; 137 #endif 138 139 140 /******************************************************************************* 141 * Structure used for telling the next BL how much of a particular type of 142 * memory is available for its use and how much is already used. 143 ******************************************************************************/ 144 typedef struct meminfo { 145 uint64_t total_base; 146 size_t total_size; 147 uint64_t free_base; 148 size_t free_size; 149 } meminfo_t; 150 151 typedef struct aapcs64_params { 152 unsigned long arg0; 153 unsigned long arg1; 154 unsigned long arg2; 155 unsigned long arg3; 156 unsigned long arg4; 157 unsigned long arg5; 158 unsigned long arg6; 159 unsigned long arg7; 160 } aapcs64_params_t; 161 162 /*************************************************************************** 163 * This structure provides version information and the size of the 164 * structure, attributes for the structure it represents 165 ***************************************************************************/ 166 typedef struct param_header { 167 uint8_t type; /* type of the structure */ 168 uint8_t version; /* version of this structure */ 169 uint16_t size; /* size of this structure in bytes */ 170 uint32_t attr; /* attributes: unused bits SBZ */ 171 } param_header_t; 172 173 /***************************************************************************** 174 * This structure represents the superset of information needed while 175 * switching exception levels. The only two mechanisms to do so are 176 * ERET & SMC. Security state is indicated using bit zero of header 177 * attribute 178 * NOTE: BL1 expects entrypoint followed by spsr while processing 179 * SMC to jump to BL31 from the start of entry_point_info 180 *****************************************************************************/ 181 typedef struct entry_point_info { 182 param_header_t h; 183 uintptr_t pc; 184 uint32_t spsr; 185 aapcs64_params_t args; 186 } entry_point_info_t; 187 188 /***************************************************************************** 189 * Image info binary provides information from the image loader that 190 * can be used by the firmware to manage available trusted RAM. 191 * More advanced firmware image formats can provide additional 192 * information that enables optimization or greater flexibility in the 193 * common firmware code 194 *****************************************************************************/ 195 typedef struct image_info { 196 param_header_t h; 197 uintptr_t image_base; /* physical address of base of image */ 198 uint32_t image_size; /* bytes read from image file */ 199 } image_info_t; 200 201 /******************************************************************************* 202 * This structure represents the superset of information that can be passed to 203 * BL31 e.g. while passing control to it from BL2. The BL32 parameters will be 204 * populated only if BL2 detects its presence. A pointer to a structure of this 205 * type should be passed in X0 to BL3-1's cold boot entrypoint. 206 * 207 * Use of this structure and the X0 parameter is not mandatory: the BL3-1 208 * platform code can use other mechanisms to provide the necessary information 209 * about BL3-2 and BL3-3 to the common and SPD code. 210 * 211 * BL3-1 image information is mandatory if this structure is used. If either of 212 * the optional BL3-2 and BL3-3 image information is not provided, this is 213 * indicated by the respective image_info pointers being zero. 214 ******************************************************************************/ 215 typedef struct bl31_params { 216 param_header_t h; 217 image_info_t *bl31_image_info; 218 entry_point_info_t *bl32_ep_info; 219 image_info_t *bl32_image_info; 220 entry_point_info_t *bl33_ep_info; 221 image_info_t *bl33_image_info; 222 } bl31_params_t; 223 224 225 /* 226 * Compile time assertions related to the 'entry_point_info' structure to 227 * ensure that the assembler and the compiler view of the offsets of 228 * the structure members is the same. 229 */ 230 CASSERT(ENTRY_POINT_INFO_PC_OFFSET == 231 __builtin_offsetof(entry_point_info_t, pc), \ 232 assert_BL31_pc_offset_mismatch); 233 234 CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \ 235 __builtin_offsetof(entry_point_info_t, args), \ 236 assert_BL31_args_offset_mismatch); 237 238 CASSERT(sizeof(unsigned long) == 239 __builtin_offsetof(entry_point_info_t, spsr) - \ 240 __builtin_offsetof(entry_point_info_t, pc), \ 241 assert_entrypoint_and_spsr_should_be_adjacent); 242 243 /******************************************************************************* 244 * Function & variable prototypes 245 ******************************************************************************/ 246 unsigned long page_align(unsigned long, unsigned); 247 unsigned long image_size(unsigned int image_id); 248 int load_image(meminfo_t *mem_layout, 249 unsigned int image_id, 250 uintptr_t image_base, 251 image_info_t *image_data, 252 entry_point_info_t *entry_point_info); 253 int load_auth_image(meminfo_t *mem_layout, 254 unsigned int image_name, 255 uintptr_t image_base, 256 image_info_t *image_data, 257 entry_point_info_t *entry_point_info); 258 extern const char build_message[]; 259 extern const char version_string[]; 260 261 void reserve_mem(uint64_t *free_base, size_t *free_size, 262 uint64_t addr, size_t size); 263 264 void print_entry_point_info(const entry_point_info_t *ep_info); 265 266 #endif /*__ASSEMBLY__*/ 267 268 #endif /* __BL_COMMON_H__ */ 269