1 /* 2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef __BL_COMMON_H__ 32 #define __BL_COMMON_H__ 33 34 #define SECURE 0x0 35 #define NON_SECURE 0x1 36 37 #define UP 1 38 #define DOWN 0 39 40 /******************************************************************************* 41 * Constants to identify the location of a memory region in a given memory 42 * layout. 43 ******************************************************************************/ 44 #define TOP 0x1 45 #define BOTTOM !TOP 46 47 /****************************************************************************** 48 * Opcode passed in x0 to tell next EL that we want to run an image. 49 * Corresponds to the function ID of the only SMC that the BL1 exception 50 * handlers service. That's why the chosen value is the first function ID of 51 * the ARM SMC64 range. 52 *****************************************************************************/ 53 #define RUN_IMAGE 0xC0000000 54 55 /******************************************************************************* 56 * Constants that allow assembler code to access members of and the 57 * 'entry_point_info' structure at their correct offsets. 58 ******************************************************************************/ 59 #define ENTRY_POINT_INFO_PC_OFFSET 0x08 60 #define ENTRY_POINT_INFO_ARGS_OFFSET 0x18 61 62 #define PARAM_EP_SECURITY_MASK 0x1 63 #define GET_SECURITY_STATE(x) (x & PARAM_EP_SECURITY_MASK) 64 #define SET_SECURITY_STATE(x, security) \ 65 ((x) = ((x) & ~PARAM_EP_SECURITY_MASK) | (security)) 66 67 #define EP_EE_MASK 0x2 68 #define EP_EE_LITTLE 0x0 69 #define EP_EE_BIG 0x2 70 #define EP_GET_EE(x) (x & EP_EE_MASK) 71 #define EP_SET_EE(x, ee) ((x) = ((x) & ~EP_EE_MASK) | (ee)) 72 73 #define EP_ST_MASK 0x4 74 #define EP_ST_DISABLE 0x0 75 #define EP_ST_ENABLE 0x4 76 #define EP_GET_ST(x) (x & EP_ST_MASK) 77 #define EP_SET_ST(x, ee) ((x) = ((x) & ~EP_ST_MASK) | (ee)) 78 79 #define PARAM_EP 0x01 80 #define PARAM_IMAGE_BINARY 0x02 81 #define PARAM_BL31 0x03 82 83 #define VERSION_1 0x01 84 85 #define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \ 86 (_p)->h.type = (uint8_t)(_type); \ 87 (_p)->h.version = (uint8_t)(_ver); \ 88 (_p)->h.size = (uint16_t)sizeof(*_p); \ 89 (_p)->h.attr = (uint32_t)(_attr) ; \ 90 } while (0) 91 92 #ifndef __ASSEMBLY__ 93 #include <cdefs.h> /* For __dead2 */ 94 #include <cassert.h> 95 #include <stdint.h> 96 #include <stddef.h> 97 98 /******************************************************************************* 99 * Structure used for telling the next BL how much of a particular type of 100 * memory is available for its use and how much is already used. 101 ******************************************************************************/ 102 typedef struct meminfo { 103 uint64_t total_base; 104 size_t total_size; 105 uint64_t free_base; 106 size_t free_size; 107 } meminfo_t; 108 109 typedef struct aapcs64_params { 110 unsigned long arg0; 111 unsigned long arg1; 112 unsigned long arg2; 113 unsigned long arg3; 114 unsigned long arg4; 115 unsigned long arg5; 116 unsigned long arg6; 117 unsigned long arg7; 118 } aapcs64_params_t; 119 120 /*************************************************************************** 121 * This structure provides version information and the size of the 122 * structure, attributes for the structure it represents 123 ***************************************************************************/ 124 typedef struct param_header { 125 uint8_t type; /* type of the structure */ 126 uint8_t version; /* version of this structure */ 127 uint16_t size; /* size of this structure in bytes */ 128 uint32_t attr; /* attributes: unused bits SBZ */ 129 } param_header_t; 130 131 /***************************************************************************** 132 * This structure represents the superset of information needed while 133 * switching exception levels. The only two mechanisms to do so are 134 * ERET & SMC. Security state is indicated using bit zero of header 135 * attribute 136 * NOTE: BL1 expects entrypoint followed by spsr while processing 137 * SMC to jump to BL31 from the start of entry_point_info 138 *****************************************************************************/ 139 typedef struct entry_point_info { 140 param_header_t h; 141 uintptr_t pc; 142 uint32_t spsr; 143 aapcs64_params_t args; 144 } entry_point_info_t; 145 146 /***************************************************************************** 147 * Image info binary provides information from the image loader that 148 * can be used by the firmware to manage available trusted RAM. 149 * More advanced firmware image formats can provide additional 150 * information that enables optimization or greater flexibility in the 151 * common firmware code 152 *****************************************************************************/ 153 typedef struct image_info { 154 param_header_t h; 155 uintptr_t image_base; /* physical address of base of image */ 156 uint32_t image_size; /* bytes read from image file */ 157 } image_info_t; 158 159 /******************************************************************************* 160 * This structure represents the superset of information that can be passed to 161 * BL31 e.g. while passing control to it from BL2. The BL32 parameters will be 162 * populated only if BL2 detects its presence. A pointer to a structure of this 163 * type should be passed in X3 to BL31's cold boot entrypoint 164 * 165 * Use of this structure and the X3 parameter is not mandatory: the BL3-1 166 * platform code can use other mechanisms to provide the necessary information 167 * about BL3-2 and BL3-3 to the common and SPD code. 168 * 169 * BL3-1 image information is mandatory if this structure is used. If either of 170 * the optional BL3-2 and BL3-3 image information is not provided, this is 171 * indicated by the respective image_info pointers being zero. 172 ******************************************************************************/ 173 typedef struct bl31_params { 174 param_header_t h; 175 image_info_t *bl31_image_info; 176 entry_point_info_t *bl32_ep_info; 177 image_info_t *bl32_image_info; 178 entry_point_info_t *bl33_ep_info; 179 image_info_t *bl33_image_info; 180 } bl31_params_t; 181 182 183 /* 184 * Compile time assertions related to the 'entry_point_info' structure to 185 * ensure that the assembler and the compiler view of the offsets of 186 * the structure members is the same. 187 */ 188 CASSERT(ENTRY_POINT_INFO_PC_OFFSET == 189 __builtin_offsetof(entry_point_info_t, pc), \ 190 assert_BL31_pc_offset_mismatch); 191 192 CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \ 193 __builtin_offsetof(entry_point_info_t, args), \ 194 assert_BL31_args_offset_mismatch); 195 196 CASSERT(sizeof(unsigned long) == 197 __builtin_offsetof(entry_point_info_t, spsr) - \ 198 __builtin_offsetof(entry_point_info_t, pc), \ 199 assert_entrypoint_and_spsr_should_be_adjacent); 200 201 /******************************************************************************* 202 * Function & variable prototypes 203 ******************************************************************************/ 204 unsigned long page_align(unsigned long, unsigned); 205 void change_security_state(unsigned int); 206 unsigned long image_size(const char *); 207 int load_image(meminfo_t *mem_layout, 208 const char *image_name, 209 uint64_t image_base, 210 image_info_t *image_data, 211 entry_point_info_t *entry_point_info); 212 extern const char build_message[]; 213 214 void reserve_mem(uint64_t *free_base, size_t *free_size, 215 uint64_t addr, size_t size); 216 217 #endif /*__ASSEMBLY__*/ 218 219 #endif /* __BL_COMMON_H__ */ 220