1 /* 2 * Copyright (c) 2022, ARM Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef TRAP_HANDLE_H 8 #define TRAP_HANDLE_H 9 10 #include <stdbool.h> 11 #include <context.h> 12 13 #define ISS_SYSREG_OPCODE_MASK 0x3ffc1eUL 14 #define ISS_SYSREG_REG_MASK 0x0003e0UL 15 #define ISS_SYSREG_REG_SHIFT 5U 16 #define ISS_SYSREG_DIRECTION_MASK 0x000001UL 17 18 #define ISS_SYSREG_OPCODE_RNDR 0x30c808U 19 #define ISS_SYSREG_OPCODE_RNDRRS 0x32c808U 20 21 #define TRAP_RET_UNHANDLED -1 22 #define TRAP_RET_REPEAT 0 23 #define TRAP_RET_CONTINUE 1 24 25 #ifndef __ASSEMBLER__ 26 static inline unsigned int get_sysreg_iss_rt(uint64_t esr) 27 { 28 return (esr & ISS_SYSREG_REG_MASK) >> ISS_SYSREG_REG_SHIFT; 29 } 30 31 static inline bool is_sysreg_iss_write(uint64_t esr) 32 { 33 return !(esr & ISS_SYSREG_DIRECTION_MASK); 34 } 35 36 /** 37 * handle_sysreg_trap() - Handle AArch64 system register traps from lower ELs 38 * @esr_el3: The content of ESR_EL3, containing the trap syndrome information 39 * @ctx: Pointer to the lower EL context, containing saved registers 40 * 41 * Called by the exception handler when a synchronous trap identifies as a 42 * system register trap (EC=0x18). ESR contains the encoding of the op[x] and 43 * CRm/CRn fields, to identify the system register, and the target/source 44 * GPR plus the direction (MRS/MSR). The lower EL's context can be altered 45 * by the function, to inject back the result of the emulation. 46 * 47 * Return: indication how to proceed with the trap: 48 * TRAP_RET_UNHANDLED(-1): trap is unhandled, trigger panic 49 * TRAP_RET_REPEAT(0): trap was handled, return to the trapping instruction 50 * (repeating it) 51 * TRAP_RET_CONTINUE(1): trap was handled, return to the next instruction 52 * (continuing after it) 53 */ 54 int handle_sysreg_trap(uint64_t esr_el3, cpu_context_t *ctx); 55 56 /* Prototypes for system register emulation handlers provided by platforms. */ 57 int plat_handle_rng_trap(uint64_t esr_el3, cpu_context_t *ctx); 58 59 #endif /* __ASSEMBLER__ */ 60 61 #endif 62