xref: /rk3399_ARM-atf/include/bl31/interrupt_mgmt.h (revision e1333f753f2760499ceed5c2d8f816574c3feb02)
1*e1333f75SAchin Gupta /*
2*e1333f75SAchin Gupta  * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
3*e1333f75SAchin Gupta  *
4*e1333f75SAchin Gupta  * Redistribution and use in source and binary forms, with or without
5*e1333f75SAchin Gupta  * modification, are permitted provided that the following conditions are met:
6*e1333f75SAchin Gupta  *
7*e1333f75SAchin Gupta  * Redistributions of source code must retain the above copyright notice, this
8*e1333f75SAchin Gupta  * list of conditions and the following disclaimer.
9*e1333f75SAchin Gupta  *
10*e1333f75SAchin Gupta  * Redistributions in binary form must reproduce the above copyright notice,
11*e1333f75SAchin Gupta  * this list of conditions and the following disclaimer in the documentation
12*e1333f75SAchin Gupta  * and/or other materials provided with the distribution.
13*e1333f75SAchin Gupta  *
14*e1333f75SAchin Gupta  * Neither the name of ARM nor the names of its contributors may be used
15*e1333f75SAchin Gupta  * to endorse or promote products derived from this software without specific
16*e1333f75SAchin Gupta  * prior written permission.
17*e1333f75SAchin Gupta  *
18*e1333f75SAchin Gupta  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19*e1333f75SAchin Gupta  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20*e1333f75SAchin Gupta  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21*e1333f75SAchin Gupta  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22*e1333f75SAchin Gupta  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23*e1333f75SAchin Gupta  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24*e1333f75SAchin Gupta  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25*e1333f75SAchin Gupta  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26*e1333f75SAchin Gupta  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27*e1333f75SAchin Gupta  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28*e1333f75SAchin Gupta  * POSSIBILITY OF SUCH DAMAGE.
29*e1333f75SAchin Gupta  */
30*e1333f75SAchin Gupta 
31*e1333f75SAchin Gupta #ifndef __INTERRUPT_MGMT_H__
32*e1333f75SAchin Gupta #define __INTERRUPT_MGMT_H__
33*e1333f75SAchin Gupta 
34*e1333f75SAchin Gupta #include <arch.h>
35*e1333f75SAchin Gupta 
36*e1333f75SAchin Gupta /*******************************************************************************
37*e1333f75SAchin Gupta  * Constants for the types of interrupts recognised by the IM framework
38*e1333f75SAchin Gupta  ******************************************************************************/
39*e1333f75SAchin Gupta #define INTR_TYPE_S_EL1			0
40*e1333f75SAchin Gupta #define INTR_TYPE_EL3			1
41*e1333f75SAchin Gupta #define INTR_TYPE_NS			2
42*e1333f75SAchin Gupta #define MAX_INTR_TYPES			3
43*e1333f75SAchin Gupta #define INTR_TYPE_INVAL			MAX_INTR_TYPES
44*e1333f75SAchin Gupta /*
45*e1333f75SAchin Gupta  * Constant passed to the interrupt handler in the 'id' field when the
46*e1333f75SAchin Gupta  * framework does not read the gic registers to determine the interrupt id.
47*e1333f75SAchin Gupta  */
48*e1333f75SAchin Gupta #define INTR_ID_UNAVAILABLE		0xFFFFFFFF
49*e1333f75SAchin Gupta 
50*e1333f75SAchin Gupta 
51*e1333f75SAchin Gupta /*******************************************************************************
52*e1333f75SAchin Gupta  * Mask for _both_ the routing model bits in the 'flags' parameter and
53*e1333f75SAchin Gupta  * constants to define the valid routing models for each supported interrupt
54*e1333f75SAchin Gupta  * type
55*e1333f75SAchin Gupta  ******************************************************************************/
56*e1333f75SAchin Gupta #define INTR_RM_FLAGS_SHIFT		0x0
57*e1333f75SAchin Gupta #define INTR_RM_FLAGS_MASK		0x3
58*e1333f75SAchin Gupta /* Routed to EL3 from NS. Taken to S-EL1 from Secure */
59*e1333f75SAchin Gupta #define INTR_SEL1_VALID_RM0		0x2
60*e1333f75SAchin Gupta /* Routed to EL3 from NS and Secure */
61*e1333f75SAchin Gupta #define INTR_SEL1_VALID_RM1		0x3
62*e1333f75SAchin Gupta /* Routed to EL1/EL2 from NS and to S-EL1 from Secure */
63*e1333f75SAchin Gupta #define INTR_NS_VALID_RM0		0x0
64*e1333f75SAchin Gupta /* Routed to EL1/EL2 from NS and to EL3 from Secure */
65*e1333f75SAchin Gupta #define INTR_NS_VALID_RM1		0x1
66*e1333f75SAchin Gupta 
67*e1333f75SAchin Gupta 
68*e1333f75SAchin Gupta /*******************************************************************************
69*e1333f75SAchin Gupta  * Constants for the _individual_ routing model bits in the 'flags' field for
70*e1333f75SAchin Gupta  * each interrupt type and mask to validate the 'flags' parameter while
71*e1333f75SAchin Gupta  * registering an interrupt handler
72*e1333f75SAchin Gupta  ******************************************************************************/
73*e1333f75SAchin Gupta #define INTR_TYPE_FLAGS_MASK		0xFFFFFFFC
74*e1333f75SAchin Gupta 
75*e1333f75SAchin Gupta #define INTR_RM_FROM_SEC_SHIFT		SECURE		/* BIT[0] */
76*e1333f75SAchin Gupta #define INTR_RM_FROM_NS_SHIFT		NON_SECURE	/* BIT[1] */
77*e1333f75SAchin Gupta #define INTR_RM_FROM_FLAG_MASK		1
78*e1333f75SAchin Gupta #define get_interrupt_rm_flag(flag, ss)	(((flag >> INTR_RM_FLAGS_SHIFT) >> ss) \
79*e1333f75SAchin Gupta 					 & INTR_RM_FROM_FLAG_MASK)
80*e1333f75SAchin Gupta #define set_interrupt_rm_flag(flag, ss)	(flag |= 1 << ss)
81*e1333f75SAchin Gupta #define clr_interrupt_rm_flag(flag, ss)	(flag &= ~(1 << ss))
82*e1333f75SAchin Gupta 
83*e1333f75SAchin Gupta 
84*e1333f75SAchin Gupta /*******************************************************************************
85*e1333f75SAchin Gupta  * Macros to validate the routing model bits in the 'flags' for a type
86*e1333f75SAchin Gupta  * of interrupt. If the model does not match one of the valid masks
87*e1333f75SAchin Gupta  * -EINVAL is returned.
88*e1333f75SAchin Gupta  ******************************************************************************/
89*e1333f75SAchin Gupta #define validate_sel1_interrupt_rm(x)	(x == INTR_SEL1_VALID_RM0 ? 0 : \
90*e1333f75SAchin Gupta 					 (x == INTR_SEL1_VALID_RM1 ? 0 :\
91*e1333f75SAchin Gupta 					  -EINVAL))
92*e1333f75SAchin Gupta 
93*e1333f75SAchin Gupta #define validate_ns_interrupt_rm(x)	(x == INTR_NS_VALID_RM0 ? 0 : \
94*e1333f75SAchin Gupta 					 (x == INTR_NS_VALID_RM1 ? 0 :\
95*e1333f75SAchin Gupta 					  -EINVAL))
96*e1333f75SAchin Gupta 
97*e1333f75SAchin Gupta /*******************************************************************************
98*e1333f75SAchin Gupta  * Macros to set the 'flags' parameter passed to an interrupt type handler. Only
99*e1333f75SAchin Gupta  * the flag to indicate the security state when the exception was generated is
100*e1333f75SAchin Gupta  * supported.
101*e1333f75SAchin Gupta  ******************************************************************************/
102*e1333f75SAchin Gupta #define INTR_SRC_SS_FLAG_SHIFT		0		/* BIT[0] */
103*e1333f75SAchin Gupta #define INTR_SRC_SS_FLAG_MASK		1
104*e1333f75SAchin Gupta #define set_interrupt_src_ss(flag, val)	(flag |= val << INTR_SRC_SS_FLAG_SHIFT)
105*e1333f75SAchin Gupta #define clr_interrupt_src_ss(flag)	(flag &= ~(1 << INTR_SRC_SS_FLAG_SHIFT))
106*e1333f75SAchin Gupta #define get_interrupt_src_ss(flag)	((flag >> INTR_SRC_SS_FLAG_SHIFT) & \
107*e1333f75SAchin Gupta 					 INTR_SRC_SS_FLAG_MASK)
108*e1333f75SAchin Gupta 
109*e1333f75SAchin Gupta #ifndef __ASSEMBLY__
110*e1333f75SAchin Gupta 
111*e1333f75SAchin Gupta /* Prototype for defining a handler for an interrupt type */
112*e1333f75SAchin Gupta typedef uint64_t (*interrupt_type_handler_t)(uint32_t id,
113*e1333f75SAchin Gupta 					     uint32_t flags,
114*e1333f75SAchin Gupta 					     void *handle,
115*e1333f75SAchin Gupta 					     void *cookie);
116*e1333f75SAchin Gupta 
117*e1333f75SAchin Gupta /*******************************************************************************
118*e1333f75SAchin Gupta  * Function & variable prototypes
119*e1333f75SAchin Gupta  ******************************************************************************/
120*e1333f75SAchin Gupta extern uint32_t get_scr_el3_from_routing_model(uint32_t security_state);
121*e1333f75SAchin Gupta extern int32_t set_routing_model(uint32_t type, uint32_t flags);
122*e1333f75SAchin Gupta extern int32_t register_interrupt_type_handler(uint32_t type,
123*e1333f75SAchin Gupta 					       interrupt_type_handler_t handler,
124*e1333f75SAchin Gupta 					       uint32_t flags);
125*e1333f75SAchin Gupta extern interrupt_type_handler_t get_interrupt_type_handler(uint32_t interrupt_type);
126*e1333f75SAchin Gupta 
127*e1333f75SAchin Gupta #endif /*__ASSEMBLY__*/
128*e1333f75SAchin Gupta #endif /* __INTERRUPT_MGMT_H__ */
129