xref: /rk3399_ARM-atf/include/bl1/bl1.h (revision 48bfb88eb6087bb3a293a13a0f702a0e40466b14)
1*48bfb88eSYatharth Kochar /*
2*48bfb88eSYatharth Kochar  * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3*48bfb88eSYatharth Kochar  *
4*48bfb88eSYatharth Kochar  * Redistribution and use in source and binary forms, with or without
5*48bfb88eSYatharth Kochar  * modification, are permitted provided that the following conditions are met:
6*48bfb88eSYatharth Kochar  *
7*48bfb88eSYatharth Kochar  * Redistributions of source code must retain the above copyright notice, this
8*48bfb88eSYatharth Kochar  * list of conditions and the following disclaimer.
9*48bfb88eSYatharth Kochar  *
10*48bfb88eSYatharth Kochar  * Redistributions in binary form must reproduce the above copyright notice,
11*48bfb88eSYatharth Kochar  * this list of conditions and the following disclaimer in the documentation
12*48bfb88eSYatharth Kochar  * and/or other materials provided with the distribution.
13*48bfb88eSYatharth Kochar  *
14*48bfb88eSYatharth Kochar  * Neither the name of ARM nor the names of its contributors may be used
15*48bfb88eSYatharth Kochar  * to endorse or promote products derived from this software without specific
16*48bfb88eSYatharth Kochar  * prior written permission.
17*48bfb88eSYatharth Kochar  *
18*48bfb88eSYatharth Kochar  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19*48bfb88eSYatharth Kochar  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20*48bfb88eSYatharth Kochar  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21*48bfb88eSYatharth Kochar  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22*48bfb88eSYatharth Kochar  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23*48bfb88eSYatharth Kochar  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24*48bfb88eSYatharth Kochar  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25*48bfb88eSYatharth Kochar  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26*48bfb88eSYatharth Kochar  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27*48bfb88eSYatharth Kochar  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28*48bfb88eSYatharth Kochar  * POSSIBILITY OF SUCH DAMAGE.
29*48bfb88eSYatharth Kochar  */
30*48bfb88eSYatharth Kochar 
31*48bfb88eSYatharth Kochar #ifndef __BL1_FWU_H__
32*48bfb88eSYatharth Kochar #define __BL1_FWU_H__
33*48bfb88eSYatharth Kochar 
34*48bfb88eSYatharth Kochar #include <bl_common.h>
35*48bfb88eSYatharth Kochar 
36*48bfb88eSYatharth Kochar /*
37*48bfb88eSYatharth Kochar  * Defines for BL1 SMC function ids.
38*48bfb88eSYatharth Kochar  */
39*48bfb88eSYatharth Kochar #define BL1_SMC_CALL_COUNT		0x0
40*48bfb88eSYatharth Kochar #define BL1_SMC_UID			0x1
41*48bfb88eSYatharth Kochar /* SMC #0x2 reserved */
42*48bfb88eSYatharth Kochar #define BL1_SMC_VERSION			0x3
43*48bfb88eSYatharth Kochar 
44*48bfb88eSYatharth Kochar /*
45*48bfb88eSYatharth Kochar  * Corresponds to the function ID of the SMC that
46*48bfb88eSYatharth Kochar  * the BL1 exception handler service to execute BL31.
47*48bfb88eSYatharth Kochar  */
48*48bfb88eSYatharth Kochar #define BL1_SMC_RUN_IMAGE		0x4
49*48bfb88eSYatharth Kochar 
50*48bfb88eSYatharth Kochar /*
51*48bfb88eSYatharth Kochar  * BL1 SMC version
52*48bfb88eSYatharth Kochar  */
53*48bfb88eSYatharth Kochar #define BL1_SMC_MAJOR_VER		0x0
54*48bfb88eSYatharth Kochar #define BL1_SMC_MINOR_VER		0x1
55*48bfb88eSYatharth Kochar 
56*48bfb88eSYatharth Kochar /*
57*48bfb88eSYatharth Kochar  * Defines for FWU SMC function ids.
58*48bfb88eSYatharth Kochar  */
59*48bfb88eSYatharth Kochar 
60*48bfb88eSYatharth Kochar #define FWU_SMC_IMAGE_COPY		0x10
61*48bfb88eSYatharth Kochar #define FWU_SMC_IMAGE_AUTH		0x11
62*48bfb88eSYatharth Kochar #define FWU_SMC_IMAGE_EXECUTE		0x12
63*48bfb88eSYatharth Kochar #define FWU_SMC_IMAGE_RESUME		0x13
64*48bfb88eSYatharth Kochar #define FWU_SMC_SEC_IMAGE_DONE		0x14
65*48bfb88eSYatharth Kochar #define FWU_SMC_UPDATE_DONE		0x15
66*48bfb88eSYatharth Kochar 
67*48bfb88eSYatharth Kochar /*
68*48bfb88eSYatharth Kochar  * Number of FWU calls (above) implemented
69*48bfb88eSYatharth Kochar  */
70*48bfb88eSYatharth Kochar #define FWU_NUM_SMC_CALLS		6
71*48bfb88eSYatharth Kochar 
72*48bfb88eSYatharth Kochar #if TRUSTED_BOARD_BOOT
73*48bfb88eSYatharth Kochar # define BL1_NUM_SMC_CALLS		(FWU_NUM_SMC_CALLS + 4)
74*48bfb88eSYatharth Kochar #else
75*48bfb88eSYatharth Kochar # define BL1_NUM_SMC_CALLS		4
76*48bfb88eSYatharth Kochar #endif
77*48bfb88eSYatharth Kochar 
78*48bfb88eSYatharth Kochar /*
79*48bfb88eSYatharth Kochar  * The macros below are used to identify FWU
80*48bfb88eSYatharth Kochar  * calls from the SMC function ID
81*48bfb88eSYatharth Kochar  */
82*48bfb88eSYatharth Kochar #define FWU_SMC_FID_START		FWU_SMC_IMAGE_COPY
83*48bfb88eSYatharth Kochar #define FWU_SMC_FID_END			FWU_SMC_UPDATE_DONE
84*48bfb88eSYatharth Kochar #define is_fwu_fid(_fid) \
85*48bfb88eSYatharth Kochar     ((_fid >= FWU_SMC_FID_START) && (_fid <= FWU_SMC_FID_END))
86*48bfb88eSYatharth Kochar 
87*48bfb88eSYatharth Kochar #ifndef __ASSEMBLY__
88*48bfb88eSYatharth Kochar #include <cassert.h>
89*48bfb88eSYatharth Kochar 
90*48bfb88eSYatharth Kochar /*
91*48bfb88eSYatharth Kochar  * Check if the total number of FWU SMC calls are as expected.
92*48bfb88eSYatharth Kochar  */
93*48bfb88eSYatharth Kochar CASSERT(FWU_NUM_SMC_CALLS == 	\
94*48bfb88eSYatharth Kochar 		(FWU_SMC_FID_END - FWU_SMC_FID_START + 1),\
95*48bfb88eSYatharth Kochar 		assert_FWU_NUM_SMC_CALLS_mismatch);
96*48bfb88eSYatharth Kochar 
97*48bfb88eSYatharth Kochar #endif /* __ASSEMBLY__ */
98*48bfb88eSYatharth Kochar #endif /* __BL1_FWU_H__ */
99